STS1TX datasheet(61/70 Pages) STMICROELECTRONICS

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STS1TX

Table 37. Packet/protocol configuration registers

Address

Bit

Field Name

Reset

R/W

Description

PCKTCTRL4

0x30

7:5

Reserved

000

R/W

4:3

ADDRESS_LEN[1:0]

Length of address field in

bytes:

0 or 1: Basic

2: STack

2:0

CONTROL_LEN

000

Length of control field in

bytes

PCKTCTRL3

0x31

7:6

PCKT_FRMT[1:0]

R/W

Format of packet.

0: basic,

2: WM-Bus,

3: STack

(see Section 9.5)

5:4

Reserved

3:0

LEN_WID

0111

Size in number of binary digit

of length field

PCKTCTRL2

0x32

7:3

PREAMBLE_LENGTH[

4:0]

00011

R/W

Length of preamble field in

bytes (from 1 to 32)

2:1

SYNC_LENGTH[1:0]

Length of sync field in bytes

(from 1 to 4)

FIX_VAR_LEN

Packet length mode.

0: fixed,

1: variable (in variable mode

the field LEN_WID of

PCKTCTRL3 register must

be configured)

PCKTCTRL1

0x33

7:5

CRC_MODE[2:0]

001

R/W

CRC:

0: No CRC,

1: 0x07,

2: 0x8005,

3: 0x1021,

4: 0x864CBF

4WHIT_EN[0]

1: enable the whitening mode

on the data

(see Section 9.4.3)

3:2

TXSOURCE[1:0]

TX source data:

0: normal mode,

1: direct through FIFO,

2: direct through GPIO,

3: PN9

1Reserved

0FEC_EN

1: enable the FEC encoding

in TX. (see Section 9.4.1)

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