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L9301 データシート(PDF) 35 Page - STMicroelectronics |
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L9301 データシート(HTML) 35 Page - STMicroelectronics |
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35 / 51 page ![]() DocID028688 Rev 6 35/51 L9301 Clock monitor 50 12 Clock monitor For safety reasons the device has two clock signals: main clock and diagnosis clock. The diagnosis clock is a redundant oscillator which has been introduced with the aim to perform a frequency check with the main clock. A dedicated digital block is present to accomplish this task. If a clock signal is running out of range, a status bit is set (clkbad). In case the main clock stops working, a digital internal reset is asserted, until POR or RES clears it. If the main clock is running 25% faster or slower than diagnosis clock, the bit clkbad is set. If the main clock is running 85% slower than diagnosis clock, a digital internal reset is asserted, the device is put to reset state, all drivers are off and no response to any input signal is given, until power off or RES pin assert (RES pin set to '0') to clear it. Table 24. Clock monitor Parameter Test condition Min. Typ. Max. Unit Main clock frequency - - 5 - MHz |
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