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L6717ATR データシート(PDF) 28 Page - STMicroelectronics |
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L6717ATR データシート(HTML) 28 Page - STMicroelectronics |
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28 / 57 page ![]() Power manager I2C L6717A 28/57 DocID024465 Rev 1 Figure 9. Power manager I2C communication format Table 11. Power manager I2C - address and command phase description bits Description Address phase 1:6 Always 110011b. 7 Slave address. According to ADDR connection, the device will act if addressed by 0b or 1b. Default address bit is 0b. 8 WRITE bit. COMMAND PHASE 1:3 Not applicable, ignored. 4:6 Command code 7, 8 Not applicable, ignored. COMMAND |
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