24LC256

256K I

www.artschip.com

3

TABLE 1-3 AC CHARACTERISTICS

All parameters apply across the

specified

operating

ranges

unless otherwise noted.

Industrial (I): Vcc=+1.8V to 5.5V

Tamb = -40℃ to +85℃

Automotive (E): Vcc=+4.5V to 5.5V Tamb=-40℃ to 125℃

Parameter

Symbol

Min

Max

Units

Conditions

Clock frequency

-

-

-

100

100

400

kHz

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

Clock high time

4000

4000

600

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

Clock low time

4700

4700

1300

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

SDA and SCL rise time

(Note 1)

TR

-

-

-

1000

1000

300

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

SDA and SCL fall Time

TF

-

300

ns

(Note 1)

START condition hold time

4000

4000

600

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

START condition setup time

4700

4700

600

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

Data input hold time

0

-

ns

(Note 2)

Data input setup time

250

250

100

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

STOP condition setup time

4000

4000

600

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

WP setup time

4000

4000

600

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

WP hold time

4700

4700

1300

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

Output valid from clock

(Note 2)

-

-

-

3500

3500

900

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

Bus free time: Time the bus

must be free before a new

transmission can start

4700

4700

1300

-

-

-

ns

4.5V≤Vcc≤5.5V (E Temp range)

1.8V≤Vcc≤2.5V

2.5V≤Vcc≤5.5V

10

250

ns

Input filter spike suppression

(SDA and SCL pins)

-

50

ns

(Notes 1 and 3)

Write cycle time (byte or page)

-

5

ms

Endurance

100,000

-

cycles

25℃, Vcc=5.0V, Block Mode (Note 4)

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns)

of the falling edge of SCL to avoid unintended generation of START or STOP conditions.

suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please

consult the Total Endurance Model Which can be obtained on artschip’s website.