24LC256

256K I

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8

8.2 Random Read

Random read operations allow the master to access any memory location in a random manner. To perform this type of read

operation, first the word address must be set. This is done by sending the word address to the 24xx256 as part of a write

operation (

bit set to 0). After the word address is sent, the master generates a start condition following the acknowledge.

This terminates the write operation, but not before the internal address pointer is set. Then, the master issues the control byte

again but with the

bit set to a one. The 24xx256 will then issue an acknowledge and transmit the 8-bit data word. The

master will not acknowledge the transfer but does generate a stop condition which causes the 24xx256 to discontinue

transmission (Figure 8-2). After a random read command, the internal address counter will point to the address location following

the one that was just read.

8.3 Sequential Read

Sequential reads are initiated in the same way was a random read except that after the 24xx256 transmits the first data byte, the

master issues an acknowledge as opposed to the stop condition used in a random read. This acknowledge directs the 24xx256 to

transmit the next sequentially addressed 8-bit word (Figure 8-3). Following the final byte transmitted to the master, the master will

NOT generate an acknowledge but will generate a stop condition. To provide sequential reads, the 24xx256 contains an internal

address pointer which is incremented by one at the completion of each operation. This address pointer allows the entire memory

contents to be serially read during one operation. The internal address pointer will automatically roll over from address 7FFF to

address 0000 if the master acknowledges the byte received from the array address 7FFF.

FIGURE 8-2: RANDOM READ

FIGURE 8-3: SEQUENTIAL READ