GD25VQ64CSIG datasheet(38/63 Pages) GIGADEVICE

38 / 63 page

2.5V Uniform Sector

Dual and Quad Serial Flash

GD25VQ64C

7.27.

High Performance Mode (HPM) (A3H)

The High Performance Mode (HPM) command must be executed prior to Dual or Quad I/O commands when operating

at high frequencies (see fR and fC3 in AC Electrical Characteristics). This command allows pre-charging of internal

charge pumps so the voltages required for accessing the flash memory array are readily available. The command

sequence: CS# goes lowSending A3H command Sending 3-dummy byteCS# goes high. After the HPM

command is executed, the device will maintain a slightly higher standby current (Icc9) than standard SPI operation. The

Release from Power-Down or HPM command (ABH) can be used to return to standard SPI standby current (Icc1). In

addition, Power-Down command (B9H) will also release the device from HPM mode back to standard SPI standby state.

Figure 32. High Performance Mode Sequence Diagram

7.28.

Program/Erase Suspend (PES) (75H)

The Program/Erase Suspend command

“75H”, allows the system to interrupt a page program or sector/block erase

operation and then read data from any other sector or block. The Write Status Register command (01H/31H/11H) and

Erase/Program Security Registers command (44H,42H) and Erase commands (20H, 52H, D8H, C7H, 60H) and Page Program

command (02H / 32H) are not allowed during Program suspend. The Write Status Register command (01H/31H/11H) and

Erase Security Registers command (44H) and Erase commands (20H, 52H, D8H, C7H, 60H) are not allowed during Erase

suspend. Program/Erase Suspend is valid only during the page program or sector/block erase operation. A maximum of

time

of “tsus” (See AC Characteristics) is required to suspend the program/erase operation.

The Program/Erase Suspend command will be accepted by the device only if the SUS2/SUS1 bit in the Status Register

equal to 0 and WIP bit equal to 1 while a Page Program or a Sector or Block Erase operation is on-going. If the SUS2/SUS1

bit equal to 1 or WIP bit equal to 0, the Suspend command will be ignored by the device. The WIP bit will be cleared from 1

to 0 within “tsus” and the SUS2/SUS1 bit will be set from 0 to 1 immediately after Program/Erase Suspend. A power-off

during the suspend period will reset the device and release the suspend state. The command sequence is show below.

Figure 33. Program/Erase Suspend Sequence Diagram

Command

75H

CS#

SCLK

High-Z

tSUS

Accept read command

Command

A3H

CS#

SCLK

29 30 31

MSB

3 Dummy Bytes

23 22

High Performance Mode

HPM

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