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STM8S データシート(PDF) 458 Page - STMicroelectronics |
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STM8S データシート(HTML) 458 Page - STMicroelectronics |
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458 / 467 page  Revision history RM0016 458/467 DocID14587 Rev 14 08-Dec-2009 6 cont’d Figure 105: Method 1: transfer sequence diagram for master receiver: Added footnote concerning the next data reception and the EV7event. Bus error (BERR): Updated. Updated Figure 116: TC/TXE behavior when transmitting and removed note concerning IDLE preamble. Updated Section 24.9: Reading the conversion result to account for the fact that the reading order of the ADC results from the buffer registers has no impact on data coherency. Section 24.11.1 and Section 24.11.2: Removed sentence about the reading order of the MSB and LSB bits respectively. Section 24.11.5: Added note about the ALIGN bit reading order. Table 79. Document revision history (continued) Date Revision Changes |
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