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RM0016

Clock control (CLK)

104

External crystal/ceramic resonator (HSE crystal)

The 1 to 24 MHz external oscillator has the advantage of producing a very accurate rate on

the main clock with 50% duty cycle.

The associated hardware configuration is shown in Figure 21. Refer to the electrical

characteristics section for more details.

At start up the clock signal produced by the oscillator is not stable, and by default a delay of

2048 osc cycles is inserted before the clock signal is released. You can program a shorter

stabilization time in the HSECNT option byte, please refer to option bytes section in the

datasheet.

The HSERDY flag in the External clock register (CLK_ECKR) indicates if the high-speed

external oscillator is stable or not. At startup, the clock is not released until this bit is set by

hardware.

The HSE Crystal can be switched on and off using the HSEEN bit in the External clock

External source (HSE user-ext)

In this mode, an external clock source must be provided. It can have a frequency of up to

24 MHz. You select this mode by programming the EXTCLK option bit. Refer to the option

bytes section of the datasheet. The external clock signal (square, sinus or triangle) with

~50% duty cycle has to drive the OSCIN pin while the OSCOUT pin is available as standard

I/O (see Figure 20).

Note:

For clock frequencies above 16 MHz, Flash /data EEPROM access must be configured for 1

wait state. This is enabled by the device option byte. Refer to the datasheet option byte

section.

9.1.2

HSI (high-speed internal) clock signal

The HSI clock signal is generated from an internal 16 MHz RC oscillator together with a

programmable divider (factor 1 to 8). This is programmed in the Clock divider register

(CLK_CKDIVR).

Note:

At startup the master clock source is automatically selected as HSI RC clock output divided

by 8 (fHSI/8).

The HSI RC oscillator has the advantage of providing a 16 MHz master clock source with

50% duty cycle at low cost (no external components). It also has a faster startup time than

the HSE crystal oscillator however, even with calibration the frequency is less accurate than

an external crystal oscillator or ceramic resonator.

The HSIRDY flag in the Internal clock register (CLK_ICKR) indicates if the HSI RC is stable

or not. At startup, the HSI RC output clock is not released until this bit is set by hardware.

The HSI RC can be switched on and off using the HSIEN bit in the Internal clock register

(CLK_ICKR).

Backup source

The HSI/8 signal can also be used as a backup source (Auxiliary clock) if the HSE crystal

oscillator fails. Refer to Section 9.6: Clock security system (CSS).

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