STM8S datasheet(106/467 Pages) STMICROELECTRONICS

部品番号	STM8S

部品情報	STM8S Series and STM8AF Series 8-bit microcontrollers

PDF	467 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

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General purpose I/O ports (GPIO)

RM0016

106/467

DocID14587 Rev 14

Figure 24. GPIO block diagram

Note:

The output stage is disabled when the analog input is selected.

11.3

Port configuration and usage

An output data register (ODR), pin input register (IDR), data direction register (DDR) are

always associated with each port.

The control register 1 (CR1) and control register 2 (CR2) allow input/output options. An I/O

pin is programmed using the corresponding bits in the DDR, ODR, CR1 and CR2 registers.

Bit n in the registers corresponds to pin n of the Port.

The various configurations are summarized in Table 21.

ODR REGISTER

DDR REGISTER

CR1 REGISTER

VDD

ALTERNATE

ENABLE

ALTERNATE

OUTPUT

PULL-UP

CONDITION

P-BUFFER

N-BUFFER

PULL-UP

ALTERNATE FUNCTION

INPUT TO ON-CHIP

VDD

DIODES

FROM

OTHER

BITS

EXTERNAL

TO INTERRUPT

INTERRUPT

CR2 REGISTER

PERIPHERAL

CONTROLLER

SLOPE

CONTROL

IDR REGISTER

(Read only)

OUTPUT

INPUT

PAD

PROTECTION

On/Off

Schmitt

trigger

Analog input

ai17840

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