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STM8S データシート(PDF) 211 Page - STMicroelectronics |
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STM8S データシート(HTML) 211 Page - STMicroelectronics |
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211 / 467 page  DocID14587 Rev 14 211/467 RM0016 16-bit advanced control timer (TIM1) 261 17.7.22 Capture/compare register 1 high (TIM1_CCR1H) Address offset: 0x15 Reset value: 0x00 17.7.23 Capture/compare register 1 low (TIM1_CCR1L) Address offset: 0x16 Reset value: 0x00 7 654 3210 CCR1[15:8] rw rw rw rw rw rw rw rw Bits 7:0 CCR1[15:8]: Capture/compare 1 value (MSB) If the CC1 channel is configured as output (CC1S bits in TIM1_CCMR1 register): The value of CCR1 is loaded permanently into the actual capture/compare 1 register if the preload feature is enabled (OC1PE bit in TIMx_CCMR1). Otherwise, the preload value is copied in the active capture/compare 1 register when a UEV occurs. The active capture/compare register contains the value which is compared to the counter register, TIMx_CNT, and signalled on the OC1 output. If the CC1 channel is configured as input (CC1S bits in TIM1_CCMR1 register): The value of CCR1 is the counter value transferred by the last input capture 1 event (IC1). In this case, these bits are read only. 7 654 3210 CCR1[7:0] rw rw rw rw rw rw rw rw Bits 7:0 CCR1[7:0]: Capture/compare 1 value (LSB) |
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