STM8S datasheet(361/467 Pages) STMICROELECTRONICS

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RM0016

Universal asynchronous receiver transmitter (UART)

377

22.5

UART low power modes

22.6

UART interrupts

Note:

The UART interrupt events are connected to two interrupt vectors (see Figure 139).

Transmission Complete or Transmit Data Register empty interrupt.

Idle Line detection, Overrun error, Receive Data register full, Parity error interrupt,

and Noise Flag.

These events generate an interrupt if the corresponding Enable Control Bit is set and the

interrupt mask in the CC register is reset (RIM instruction).

Table 59. UART interface behavior in low power modes

Mode

Description

Wait

No effect on UART.

UART interrupts cause the device to exit from Wait mode.

Halt

UART registers are frozen.

In Halt mode, the UART stops transmitting/receiving until Halt mode is exited.

Table 60. UART interrupt requests

Interrupt event

Event

flag

Enable

control

bit

Exit

from

Wait

Exit

from

Halt

Transmit data register empty

TXE

TIEN

Yes

Transmission complete

TCIEN

Yes

Received data ready to be read

RXNE

RIEN

Yes

Overrun error detected / LIN header error

OR/LHE

Yes

Idle line detected

IDLE

ILIEN

Yes

Parity error

PIEN

Yes

Break flag

LBDF

LBDIEN

Yes

Header Flag

LHDF

LHDIEN

Yes

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