ISM303DAC datasheet(70/80 Pages) STMICROELECTRONICS

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ISM303DAC

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DocID030988 Rev 2

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CFG_REG_A_M (60h)

The configuration register is used to configure the output data rate and the measurement

configuration.

Table 87. CFG_REG_A_M register

Table 88. CFG_REG_A_M register description

COMP_

TEMP_EN

REBOOT

SOFT_RST

ODR1

ODR0

MD1

MD0

COMP_

TEMP_EN(1)

1. For proper operation, this bit must be set to '1'.

Enable the magnetometer temperature compensation. Default value: 0

(0: temperature compensation disabled; 1: temperature compensation enabled)

REBOOT

Reboot magnetometer memory content. Default value: 0

(0: normal mode; 1: reboot memory content)

SOFT_RST

When this bit is set, the configuration registers and user registers are reset.

Flash registers keep their values.

Low-power mode enable. Default: 0

0: high-resolution mode 1: low-power mode enabled

ODR[1:0]

Output data rate configuration (see Table 89: Output data rate configuration)

MD[1:0]

Mode select bit. These bits select the mode of operation of the device (see

Table 90: System mode)

Table 89. Output data rate configuration

ODR1

ODR0

ODR (Hz)

10 (default)

100

Table 90. System mode

MD1

MD0

Mode

Continuous mode. In continuous mode the device continuously

performs measurements and places the result in the data register.

The data-ready signal is generated when a new data set is ready to

be read. This signal can be available on the external pin by setting

the INT_MAG bit in CFG_REG_C_M (62h).

Single mode. When single mode is selected, the device performs a

single measurement, sets DRDY high and returns to idle mode.

Mode register return to idle mode bit values.

Idle mode. Device is placed in idle mode. I2C and SPI active.

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