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ISM303DAC データシート(PDF) 37 Page - STMicroelectronics

部品番号 ISM303DAC
部品情報  High-performance, low-power, compact 3D accelerometer and 3D magnetometer module
PDF  80 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ISM303DAC データシート(HTML) 37 Page - STMicroelectronics

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ISM303DAC
Functionality
80
4.4.2
FIFO mode
In FIFO mode (FIFO_CTRL_A (25h) (FMODE [2:0])= 001) data from the X, Y and Z
channels are stored in the FIFO until it is full, when 256 unread samples are stored in
memory, data collecting is stopped.
To reset the FIFO content, Bypass mode should be written in the FIFO_CTRL_A (25h)
register, setting the FMODE [2:0] bits to '000'. After this reset command, it is possible to
restart FIFO mode, writing the value '001' in FIFO_CTRL_A (25h) (FMODE [2:0]).
The FIFO buffer can memorize 256 slots of X, Y and Z data.
4.4.3
Continuous mode
Continuous mode (FIFO_CTRL_A (25h) (FMODE[2:0] = 110) provides a continuous FIFO
update: when 256 unread samples are stored in memory, as new data arrives the oldest
data is discarded and overwritten by the newer.
A FIFO threshold flag FIFO_CTRL_A (25h) (FIFO_FTH) is asserted when the number of
unread samples in FIFO is greater than or equal to FIFO_THS_A (2Eh) (FTH[7:0]).
It is possible to route FIFO_CTRL_A (25h)(FTH) to the INT1 pin by writing the INT1_FTH bit
to '1' in register CTRL4_A (23h) or to the INT2 pin by writing the INT2_FTH bit to '1' in
register CTRL5_A (24h).
If an overrun occurs, the oldest sample in FIFO is overwritten and the FIFO_OVR flag in
FIFO_SRC_A (2Fh) is asserted.
In order to empty the FIFO before it is full, it is also possible to pull from FIFO the number of
unread samples available in FIFO_SRC_A (2Fh) and FIFO_SAMPLES_A (30h) (Diff[8:0]).
4.4.4
Continuous-to-FIFO mode
In Continuous-to-FIFO mode FIFO_CTRL_A (25h) (FMODE [2:0] = 011), FIFO operates in
Continuous mode and FIFO mode starts upon an internal trigger event. When the FIFO is
full, data collecting is stopped.
Figure 10. Continuous-to-FIFO mode
x0
y
z0
y0
x1
y1
z1
x2
y2
z2
x31
y31
z31
xi,yi,zi
Continuous Mode
FIFO Mode
Trigger event
x0
y0
z0
x1
y1
z1
x2
y2
z2
x31
y31
z31
xi,yi,zi
x30
y30
z30



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