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AD9546/PCBZ データシート(PDF) 182 Page - Analog Devices |
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AD9546/PCBZ データシート(HTML) 182 Page - Analog Devices |
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182 / 205 page ![]() AD9546 Data Sheet Rev. 0 | Page 182 of 205 CONTROL FUNCTIONALITY Configuring an Mx pin for control functionality gives the user control of specific internal device functions via an external hardware logic signal. When configured as a control pin, the modifier bits affect the control functionality per Table 108. Table 108. Mx Control Pin 2-Bit Modifier Codes Code Boolean Description 00 AND Logical AND the associated Mx control pin with the other Mx control pins assigned to the same control function. 01 NOT AND Invert the logical state of the associated Mx control pin and AND it with the other Mx control pins assigned to the same control function. 10 OR Logical OR the associated Mx control pin with the other Mx control pins assigned to the same control function. 11 NOT OR Invert the logical state of the associated Mx control pin and OR it with the other Mx control pins assigned to the same control function. The Boolean functionality of aggregated Mx control pins follows a hierarchy whereby logical OR operations occur before logical AND operations. The OR and NOT OR operations are collectively grouped into a single result. A logical AND is then performed using that result and the remaining AND and NOT AND operations. Consider a case where the M0, M2, M3, and CSB/M6 pins are configured for control functionality and are assigned to the IO update control function. That is, Bits[7:0] = 0x01 in Register 0x0182, Register 0x0184, Register 0x0185, and Register 0x0188. In addition, M0 is assigned for AND operation (00), M2 for NOT OR (11) operation, M3 for NOT AND (01) operation, and M6 for OR (10) operation (that is, the 2-bit codes according to Table 108 in the appropriate bit positions of Register 0x0100 and Register 0x0101 per Table 106). With these settings, the IO update function behaves according to the following Boolean expression: ((NOT M2) OR M6) AND M0 AND (NOT M3) In this case, an IO update occurs when M0 is Logic 1 and M3 is Logic 0, and either M2 is Logic 0 or M6 is Logic 1. When an Mx control pin acts on a control function individually (rather than as part of a group, per the previous example), the Boolean functionality of the codes in Table 108 reduces to two possibilities. Namely, Code 00 and Code 10 specify a Boolean true (the Mx pin logic state applies to the corresponding control function directly), whereas Code 01 and Code 11 specify a Boolean false (the Mx pin logic state applies to the corresponding control function with a logical inversion). |
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