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P5021 データシート(PDF) 68 Page - NXP Semiconductors |
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P5021 データシート(HTML) 68 Page - NXP Semiconductors |
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68 / 155 page ![]() P5021 QorIQ Integrated Processor Data Sheet, Rev. 1 Electrical characteristics Freescale Semiconductor 68 This table provides the DDR controller interface capacitance for DDR3 and DDR3L. This table provides the current draw characteristics for MVREF. I/O leakage current IOZ –50 50 μA6 Output high current (VOUT = 0.641 V) IOH —–23.3 mA 7, 8 Output low current (VOUT = 0.641 V) IOL 23.3 — mA 7, 8 Notes: 1. GVDD is expected to be within 50 mV of the DRAM’s voltage supply at all times. The DRAM’s and memory controller’s voltage supply may or may not be from the same source. 2. MVREF is expected to be equal to 0.5 × GVDD and to track GVDD DC variations as measured at the receiver. Peak-to-peak noise on MVREF may not exceed the MVREF DC level by more than ±1% of the DC value (that is, ±13.5 mV). 3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made, and it is expected to be equal to MVREF with a min value of MVREF – 0.04 and a max value of MVREF + 0.04. VTT should track variations in the DC level of MVREF. 4. The voltage regulator for MVREF must meet the specifications stated in Table 21. 5. Input capacitance load for DQ, DQS, and DQS are available in the IBIS models. 6. Output leakage is measured with all outputs disabled, 0 V ≤ V OUT ≤ GVDD. 7. Refer to the IBIS model for the complete output IV curve characteristics. 8. IOH and IOL are measured at GVDD = 1.283 V Table 20. DDR3 and DDR3L SDRAM Capacitance For recommended operating conditions, see Table 3. Parameter Symbol Min Max Unit Notes Input/output capacitance: DQ, DQS, DQS CIO 6 8 pF 1, 2 Delta input/output capacitance: DQ, DQS, DQS CDIO — 0.5 pF 1, 2 Notes: 1. This parameter is sampled. GVDD = 1.5 V ± 0.075 V (for DDR3), f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.150 V. 2. This parameter is sampled. GVDD = 1.35 V – 0.067 V ÷ + 0.100 V (for DDR3L), f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.167 V. Table 21. Current Draw Characteristics for MVREF For recommended operating conditions, see Table 3. Parameter Symbol Min Max Unit Notes Current draw for DDR3 SDRAM for MVREF MVREF — 1250 μA— Current draw for DDR3L SDRAM for MVREF MVREF — 1250 μA— Table 19. DDR3L SDRAM interface DC electrical characteristics (GVDD = 1.35 V) 1 (continued) For recommended operating conditions, see Table 3. Parameter Symbol Min Max Unit Note |
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