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MMPF0200Z データシート(PDF) 39 Page - NXP Semiconductors

部品番号 MMPF0200Z
部品情報  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0200Z データシート(HTML) 39 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
Freescale Semiconductor
39
PF0200Z
Functional Block Requirements and Behaviors
Power Generation
Programmable Maximum Current
The maximum current, ISWxMAX, of each buck regulator is programmable. This allows the use of smaller inductors where lower
currents are required. Programmability is accomplished by choosing the number of paralleled power stages in each regulator.
The SWx_PWRSTG[2:0] bits on the Extended Page 2 of the register map control the number of power stages. See Table 37 for
the programmable options. Bit[0] must always be enabled to ensure the stage with the current sensor is chosen. The default
setting, SWx_PWRSTG[2:0] = 111, represents the highest maximum current. The current limit for each option is also scaled by
the percentage of power stages that are enabled.
Table 36. Regulator Frequency Configuration
SWxFREQ[1:0]
Frequency
00
1.0 MHz
01
2.0 MHz
10
4.0 MHz
11
Reserved
Table 37. Programmable Current Configuration
Regulators
Control Bits
% of Power Stages
Enabled
Rated Current (A)
SW1AB
SW1AB_PWRSTG[2:0]
ISW1ABMAX
0
0
1
40%
1.0
0
1
1
80%
2.0
1
0
1
60%
1.5
1
1
1
100%
2.5
SW2
SW2_PWRSTG[2:0]
ISW2MAX
0
0
1
38%
0.55
0
1
1
75%
1.125
1
0
1
63%
0.95
1
1
1
100%
1.5
SW3A
SW3A_PWRSTG[2:0]
ISW3AMAX
0
0
1
40%
0.5
0
1
1
80%
1.0
1
0
1
60%
0.75
1
1
1
100%
1.25
SW3B
SW3B_PWRSTG[2:0]
ISW3BMAX
0
0
1
40%
0.5
0
1
1
80%
1.0
1
0
1
60%
0.75
1
1
1
100%
1.25



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