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STM8L151C2 データシート(PDF) 71 Page - STMicroelectronics

部品番号 STM8L151C2
部品情報  8-bit ultra-low-power MCU, up to 8 KB Flash, up to 256 bytes data EEPROM, RTC, timers, USART, I2C, SPI, ADC, comparators
PDF  123 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8L151C2 データシート(HTML) 71 Page - STMicroelectronics

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DS7204 Rev 11
71/123
STM8L151x2, STM8L151x3
Electrical parameters
102
Current consumption of on-chip peripherals
Table 26. Peripheral current consumption
Symbol
Parameter
Typ.
VDD = 3.0 V
Unit
IDD(TIM2)
TIM2 supply current (1)
8
µA/MHz
IDD(TIM3)
TIM3 supply current (1)
8
IDD(TIM4)
TIM4 timer supply current (1)
3
IDD(USART1)
USART1 supply current (2)
6
IDD(SPI1)
SPI1 supply current (2)
3
IDD(I2C1)
I2C1 supply current (2)
5
IDD(DMA1)
DMA1 supply current(2)
3
IDD(WWDG)
WWDG supply current(2)
2
IDD(ALL)
Peripherals ON(3)
38
µA/MHz
IDD(ADC1)
ADC1 supply current(4)
1500
µA
IDD(COMP1)
Comparator 1 supply current(5)
0.160
µA
IDD(COMP2)
Comparator 2 supply current(5)
Slow mode
2
Fast mode
5
IDD(PVD/BOR)
Power voltage detector and brownout Reset unit supply
current (6)
2.6
IDD(BOR)
Brownout Reset unit supply current (6)
2.4
IDD(IDWDG)
Independent watchdog supply current
including LSI supply
current
0.45
excluding LSI
supply current
0.05
1.
Data based on a differential IDD measurement between all peripherals OFF and a timer counter running at 16 MHz. The
CPU is in Wait mode in both cases. No IC/OC programmed, no I/O pins toggling. Not tested in production.
2.
Data based on a differential IDD measurement between the on-chip peripheral in reset configuration and not clocked and
the on-chip peripheral when clocked and not kept under reset. The CPU is in Wait mode in both cases. No I/O pins toggling.
Not tested in production.
3.
Peripherals listed above the IDD(ALL) parameter ON: TIM2, TIM3, TIM4, USART1, SPI1, I2C1, DMA1, WWDG.
4.
Data based on a differential IDD measurement between ADC1 in reset configuration and continuous ADC1 conversion.
5.
Data based on a differential IDD measurement between COMP1 or COMP2 in reset configuration and COMP1 or COMP2
enabled with static inputs. Supply current of internal reference voltage excluded.
6.
Including supply current of internal reference voltage.



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