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STM8L151C2 データシート(PDF) 80 Page - STMicroelectronics |
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STM8L151C2 データシート(HTML) 80 Page - STMicroelectronics |
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80 / 123 page ![]() Electrical parameters STM8L151x2, STM8L151x3 80/123 DS7204 Rev 11 Table 37. I/O static characteristics Symbol Parameter Conditions(1) Min Typ Max Unit VIL Input low level voltage(2) Input voltage on true open-drain pins (PC0 and PC1) VSS-0.3 - 0.3 x VDD V Input voltage on any other pin VSS-0.3 - 0.3 x VDD VIH Input high level voltage (2) Input voltage on true open-drain pins (PC0 and PC1) with VDD < 2 V 0.70 x VDD -5.2 V Input voltage on true open-drain pins (PC0 and PC1) with VDD ≥ 2 V -5.5 Input voltage on any other pin 0.70 x VDD - VDD+0.3 Vhys Schmitt trigger voltage hysteresis (3) I/Os - 200 - mV True open drain I/Os - 200 - Ilkg Input leakage current (4) VSS≤VIN≤VDD High sink I/Os - - 50 (5) nA VSS≤VIN≤VDD True open drain I/Os - - 200(5) VSS≤VIN≤VDD PA0 with high sink LED driver capability - - 200(5) RPU Weak pull-up equivalent resistor(2)(6) VIN=VSS 30 45 60 k Ω CIO I/O pin capacitance - - 5 - pF 1. VDD = 3.0 V, TA = -40 to 125 °C unless otherwise specified. 2. Guaranteed by characterization results. 3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 4. The max. value may be exceeded if negative current is injected on adjacent pins. 5. Not tested in production. 6. RPU pull-up equivalent resistor based on a resistive transistor (corresponding IPU current characteristics described in Figure 23). |
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