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L9908 データシート(PDF) 45 Page - STMicroelectronics |
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L9908 データシート(HTML) 45 Page - STMicroelectronics |
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45 / 153 page  5.9 Internal clock Table 35. Internal clock electrical characteristics Symbol Parameter Test condition Min Typ Max Unit CLK_freq System Clock Frequency CLK_SSM_EN = 0 - 20 - MHz CLK_freq_acc System Clock Frequency Accuracy CLK_SSM_EN = 0 -5 - +5 % 5.9.1 Spread Spectrum Modulation (SSM) L9908 clocks generator implements a frequency modulation (Spread Spectrum Modulation) feature to reduce the main logic and Charge Pumps emissions around the main frequency by spreading the power spectrum over a larger frequency range. Table 36. Clock spread spectrum electrical characteristics Symbol Parameter Min Typ Max Unit Notes SSM_spreading Spread Spectrum Modulation spreading range 1 3 5 % Not subject to production test SSM_freq Spread Spectrum Modulating frequency - 156.25 kHz Not subject to production test Note: All parameters are guaranteed and tested, in the voltage ranges reported above in Table 5 unless otherwise specified. Where not specified the parametrical operating range equals the functional operating range. The clock spread spectrum modulation function can be enabled by the dedicated SPI bit CLK_SSM_EN in the register GEN_CFG1 as follows: Table 37. Clock spread spectrum enable bit CLK_SSM_EN Description 0 Clock SSM Disabled (Default) 1 Clock SSM Enabled Note: When the clock spread spectrum is enabled the internal digital timings are affected by a timing jitter equal to the selected spread spectrum spreading range. 5.9.2 Internal Clock Monitor (ICM) The correct operation and the precision of the internal synchronization signal are safety relevant and therefore L9908 implements a monitoring unit to detect abnormal deviation of the clock signal frequency. The monitoring unit is based on the use of two oscillators and two monitor chains (a Main one and an Auxiliary one) to avoid common-cause failures. Each monitor chain compares the other clock period, the first one samples CLK1 by means of CLK2 and the second one samples CLK2 by means of CLK1. If TCLK1 ≥ ICM_timeout_th: the flag INT_RST and CLK1_TIME_OUT are set. If TCLK2 ≥ ICM_timeout_th: the flag CLK2_TIME_OUT is set. The error flags remain set until the failure condition is removed and the flags are cleared by the SPI command. The correct level of clock monitor is safety relevant and then a self-check procedure is implemented on its monitor. Table 38. Internal clock monitor electrical characteristics Symbol Parameter Min Typ Max Unit Notes ICM_err_th ICM frequency mismatch threshold accuracy 24 30 36 % Application information ICM_timeout_th ICM timeout accuracy 30 50 70 us Application information L9908 Internal clock DS13546 - Rev 3 page 45/153 |
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