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L9908 データシート(PDF) 37 Page - STMicroelectronics |
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L9908 データシート(HTML) 37 Page - STMicroelectronics |
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37 / 153 page  Disable logic reacts disabling all the three half bridges in a tristate mode so that VGHS_n-VSHS_n = 0 V and VGLS_n-VSLSn = 0 V [n = 1, 2, 3]. State machine remains in NORMAL mode (SPI configuration bit HBn_DIS remains set as previously configured). Safe condition is left when all the following conditions are met in the following sequence: 1. Autoretry fault is removed; 2. Autoretry fault flag is cleared on read (action required by Application SW) 3. SPI bit HBn_ACK [n = 1,2,3] is set ‘0’ and then set back to ‘1’ (action required by Application SW). Figure 17. Auto-retry faults - Transient fault timing diagram Figure 18. Auto-retry faults - Permanent fault timing diagram L9908 Fault Handling Management (FHM) DS13546 - Rev 3 page 37/153 |
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