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L9966 データシート(PDF) 13 Page - STMicroelectronics |
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L9966 データシート(HTML) 13 Page - STMicroelectronics |
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13 / 122 page  From To Description NORMAL FAULT FSM changes from NORMAL to FAULT when overtemperature (if not masked) or internal 3V3 supply fault event happens. In FAULT SPI runs and internal reference voltage are still on. FAULT NORMAL FSM changes from FAULT to NORMAL when fault event is solved. NORMAL SLEEP FSM changes from NORMAL to SLEEP when writing an activation code 3 times to the WAK_CONFIG register and then RST pin goes to 0. In SLEEP, the device configuration is kept. SLEEP POLLING FSM changes from SLEEP to POLLING once the PT_timeout time has expired. POLLING SLEEP FSM changes from POLLING to SLEEP if wake up sources don’t change their value for at least PB time since POLLING mode was entered. POLLING WAKE FSM changes from POLLING to WAKE when a wake-up event is detected for at least the sum of the 2 timeouts PB+PT (wake-up sources are detected to have changed their values). PT is polling timeout. Any RST-low mode INIT FSM changes to INIT in case a rising edge of RST is detected. Any RST-high mode RST_ACTIVE FSM power control comes back to RST_ACTIVE when RST pin goes to 0 during NORMAL, FAULT, INIT. In RST_ACTIVE, the device configuration is lost. A deglitch filter on RESET pin prevents anomalous entering in RST_ACTIVE mode. RST deglitch filter in sleep =16 μs RST deglitch filter in normal mode = 1 μs Any mode OFF FSM power control leads to OFF if UBSW falls below POR level. In Figure 6 and Figure 7 are reported an example of power up and power down sequence. In Figure 6: UBSW rises and as a consequence VPRE and 3V3 internal supply rise too. POR is an internal threshold of 3V3 regulator that enables the internal reference circuit, which guarantees that the digital blocks are correctly supplied. Assertion of 3V3_ok signal guarantees that the internal analog blocks are correctly supplied. WAKE signal is asserted once the EEPROM download is succeeded or the internal NVM_timeout is elapsed. A possible application scenario is WAKE high which wakes an external 5 V power supply which feeds VDD5 and VDD5REF and manages the RST de-assertion. Once the RST is de-asserted, the IC moves in normal operating mode. L9966 Operating modes DS12459 - Rev 10 page 13/122 |
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