L99DZ100GP datasheet(40/197 Pages) STMICROELECTRONICS

40 / 197 page

Electrical specifications

L99DZ100G, L99DZ100GP

40/197

DS11546 Rev 5

3.4.11

Power outputs switching times

The voltages are referred to power ground and currents are assumed positive, when the

current flows into the pin. 6 V ≤ VS ≤ 28 V; 6 V ≤ VSREG ≤ 28 V; Tj = -40 °C to 150 °C, unless

otherwise specified.

Table 17. Power outputs switching times

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

td ON H

Output delay time high-side driver

on (OUT1,2,3,4,5,6)

VS = 13.5 V; V1 = 5 V;

corresponding low-side

driver is not active (1)(2)(3)

(from CSN 50% to OUT

50%) see Figure 18

µs

Output delay time high-side driver

on (OUT7,8)

µs

td OFF H

Output delay time high-side driver

off (OUT1,4,5,6)

VS = 13.5 V; V1 = 5 V

(1)(2)(3) (from CSN 50% to

OUT 50%) see Figure 18

150

300

µs

Output delay time high-side driver

off (OUT2,3, 7,8)

130

µs

td ON H

Output delay time high-side driver

on (OUT9 …OUT15, OUT_HS)

VS/VSREG = 13.5 V;

V1 = 5 V; (from CSN 80% to

OUT 80%)

µs

td OFF H

Output switch off delay time high-

side driver on (OUT9 …OUT15,

OUT_HS)

VS/VSREG = 13.5 V;

V1 = 5 V; (from CSN 80% to

OUT 20%)

µs

td ON L

Output delay time low-side driver

(OUT1-6, ECV) on

VS = 13.5 V; V1 = 5 V;

corresponding high-side

driver is not active (1)(2)(3)

(from CSN 50% to OUT

50%) see Figure 18

µs

td OFF L

Output delay time low-side driver

(OUT1-6) off

VS = 13.5 V; V1 = 5 V

(1)(2)(3) (from CSN 50% to

OUT 50%) see Figure 18

150

300

µs

Output delay time low-side driver

(ECV) off

VS = 13.5 V; V1 = 5 V

(1)(2)(3) (from CSN 50% to

OUT 50%) see Figure 18

110

µs

td HL

Cross current protection time

(OUT1-6)

tcc ONLS_OFFHS – td OFF H(4)

200

400

µs

td LH

tcc ONHS_OFFLS – td OFF L (4)

dVOUT/dt Slew rate of OUT1-OUT8, ECV

VS = 13.5 V; V1 = 5 V

(1)(2)(3)

0.1

0.2

0.6

V/µs

dVmax/dt

Maximum external applied slew

rate on OUT1-OUT6 without

switching on the LS and HS (only in

Active mode)

Guaranteed by design

V/µs

dVOUT/dt

Slew rate of OUT9-OUT15,

OUT_HS

VS/VSREG = 13.5 V;

V1 = 5 V (1)(2)(3)

2V/µs

fPWMx(00) PWM switching frequency

VS/VSREG = 13.5 V;

V1 = 5 V

100

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