| データシートサーチシステム |
|
AD9380/PCB データシート(PDF) 40 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9380/PCB データシート(HTML) 40 Page - Analog Devices |
|
40 / 60 page ![]() AD9380 Rev. 0 | Page 40 of 60 0x15—Bit[6] HSYNC 1 Detection Bit This bit is used to indicate when activity is detected on the HSYNC 1 input pin. If HSYNC is held high or low, activity is not detected. The sync processing block diagram shows where this function is implemented. 0 = HSYNC 1 not active. 1 = HSYNC 1 is active. 0x15—Bit[5] VSYNC 0 Detection Bit This bit is used to indicate when activity is detected on the VSYNC0 input pin. If VSYNC is held high or low, activity is not detected. Figure 8 shows where this function is implemented. 0 = VSYNC 0 not active. 1 = VSYNC 0 is active. 0x15—Bit[4] VSYNC 1 Detection Bit This bit is used to indicate when activity is detected on the VSYNC1 input pin. If VSYNC is held high or low, activity is not detected. Figure 8 shows where this function is implemented. 0 = VSYNC1 not active. 1 = VSYNC1 is active. 0x15—Bit[3] SOG 0 Detection Bit This bit is used to indicate when activity is detected on the SOG 0 input pin. If SOG is held high or low, activity is not detected. Figure 8 shows where this function is implemented. 0 = SOG 0 not active. 1 = SOG0 is active. 0x15—Bit[2] SOG 1 Detection Bit Indicates if SOG 1 is active. This bit is used to indicate when activity is detected on the SOG 1 input pin. If SOG is held high or low, activity is not detected. Figure 8 shows where this function is implemented. 0 = SOG 1 not active. 1 = SOG 1 is active. 0x15—Bit[1] Coast Detection Bit This bit detects activity on the EXTCLK/COAST pin. It indicates that one of the two signals is active, but it doesn’t indicate if it is EXTCLK or COAST. A dc signal is not detected. 0 = no activity detected. 1 = activity detected. POLARITY STATUS 0x16—Bit[7] HSYNC 0 Polarity Indicates the polarity of the HSYNC0 input. 0 = HSYNC polarity negative. 1 = HSYNC polarity positive. 0x16—Bit[6] HSYNC 1 Polarity Indicates the polarity of the HSYNC1 input. 0 = HSYNC polarity negative. 1 = HSYNC polarity positive. 0x16—Bit[5] VSYNC 0 Polarity Indicates the polarity of the VSYNC0 input. 0 = VSYNC polarity negative. 1 = VSYNC polarity positive. 0x16—Bit[4] VSYNC 1 Polarity Indicates the polarity of the VSYNC1 input. 0 = VSYNC polarity negative. 1 = VSYNC polarity positive. 0x16—Bit[3] Coast Polarity Indicates the polarity of the external coast signal. 0 = coast polarity negative. 1 = coast polarity positive. 0x16—Bit[2] Pseudo Sync Detected This bit indicates that a pulse other than an expected HSYNC has occurred. 0x16—Bits[1] Sync Filter Locked Indicates whether sync filter is locked to periodic sync signals. 0 = sync filter locked to periodic sync signal. 1 = sync filter not locked. 0x16—Bit[0] Bad Sync Detect This bit indicates when an HSYNC has occurred outside the filter window. 0x17—Bits[3:0] HSYNCs per VSYNC MSBs The 4 MSBs of the 12-bit counter that reports the number of HSYNCs/VSYNC on the active input. This is useful in deter- mining the mode and an aid in setting the PLL divide ratio. 0x18—Bits[7:0] HSYNCs per VSYNC LSBs The 8 LSBs of the 12-bit counter that reports the number of HSYNCs/VSYNC on the active input. 0x19—Bits[7:0] Clamp Placement Number of pixel clocks after trailing edge of HSYNC to begin clamp. The power-up default is 8. 0x1A—Bits[7:0] Clamp Duration Number of pixel clocks to clamp. The power-up default is 0x14. 0x1B—Bit[7] Red Clamp Select This bit selects whether the red channel is clamped to ground or midscale. Ground clamping is used for red in RGB applications and midscale clamping is used in YPrPb (YUV) applications. 0 = channel clamped to ground during clamping period. 1 = channel clamped to midscale during clamping period. The power-up default is 0. 0x1B—Bit[6] Green Clamp Select This bit selects whether the green channel is clamped to ground or midscale. Ground clamping is normally used for green in RGB applications and YPrPb (YUV) applications. 0 = channel clamped to ground during clamping period. 1 = channel clamped to midscale during clamping period. The power-up default is 0. 0x1B—Bit[5] Blue Clamp Select This bit selects whether the blue channel is clamped to ground or midscale. Ground clamping is used for blue in RGB applications and midscale clamping is used in YPrPb (YUV) applications. 0 = channel clamped to ground during clamping period. 1 = channel clamped to midscale during clamping period. The power-up default is 0. |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |