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AD9380/PCB データシート(PDF) 15 Page - Analog Devices |
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AD9380/PCB データシート(HTML) 15 Page - Analog Devices |
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15 / 60 page ![]() AD9380 Rev. 0 | Page 15 of 60 Power Management The AD9380 uses the activity detect circuits, the active interface bits in the serial bus, the active interface override bits, the power-down bit, and the power-down pin to determine the correct power state. There are four power states: full-power, seek mode, auto power-down, and power-down. Table 8 summarizes how the AD9380 determines the power mode and the circuitry that is powered on/off in each of these modes. The power-down command has priority and then the automatic circuitry. The power-down pin (Pin 81—polarity set by Register 0x26[3]) can drive the chip into four power-down options. Bit 2 and Bit 1 of Register 0x26 control these four options. Bit 0 controls whether the chip is powered down or the outputs are placed in high impedance mode (with the exception of SOG). Bit 7 to Bit 4 of Register 0x26 control whether the outputs, SOG, Sony Philips digital interface (SPDIF ) or I2S (IIS or Inter-IC Sound bus) outputs are in high impedance mode or not. (See the 2-Wire Serial Control Register Detail section for more detail.) Table 8. Power-Down Mode Descriptions Inputs Mode Power-Down1 Sync Detect2 Auto PD Enable3 Power-On or Comments Full Power 1 1 X Everything Seek Mode 1 0 0 Everything Seek Mode 1 0 1 Serial bus, sync activity detect, SOG, band gap reference Power-Down 0 X Serial bus, sync activity detect, SOG, band gap reference 1 Power-down is controlled via Bit 0 in Serial Bus Register 0x26. 2 Sync detect is determined by OR’ing Bit 7 to Bit 2 in Serial Bus Register 0x15. 3 Auto power-down is controlled via Bit 7 in Serial Bus Register 0x27. Table 9. Recommended VCO Range and Charge Pump Current Settings for Standard Display Formats Standard Resolution Refresh Rate (Hz) Horizontal Frequency (kHz) Pixel Rate (MHz) VCO Range1 Current1 VGA 640 × 480 60 31.5 25.175 00 101 72 37.7 31.500 01 011 75 37.5 31.500 01 100 85 43.3 36.000 01 100 SVGA 800 × 600 56 35.1 36.000 01 100 60 37.9 40.000 01 101 72 48.1 50.000 01 110 75 46.9 49.500 01 110 85 53.7 56.250 01 110 XGA 1024 × 768 60 48.4 65.000 10 011 70 56.5 75.000 10 100 75 60.0 78.750 10 100 80 64.0 85.500 10 101 85 68.3 94.500 10 110 SXGA 1280 × 1024 60 64.0 108.000 10 110 1280 × 1024 75 80.0 135.000 11 110 TV 480i 60 15.75 13.51 00 010 480p 60 31.47 27 00 101 720p 60 45 74.25 10 100 1035i 60 33.75 74.25 10 100 1080i 60 33.75 74.25 10 100 1080p 60 67.5 148.5 11 110 1 These are preliminary recommendations for the analog PLL and are subject to change without notice. |
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