DocID15086 Rev 4

9/21

PM8834

Device description and operation

21

DocID15086 Rev 4

9/21

PM8834

Device description and operation

21

4

Device description and operation

The PM8834 is a dual low-side driver suitable for charging and discharging large capacitive

loads like MOSFETs or IGBTs used in power supplies and DC/DC modules. The PM8834

can sink and source 4 A on both low-side driver branches but a higher driving current can be

obtained by paralleling its outputs.

Even though this device has been designed to function with loads requiring high peak

current and fast switching time, the ultimate driving capability depends on the power

dissipation in the device which must be kept below the power dissipation capability of the

package. This aspect will be discussed in Section 5.2 on page 13.

For enhanced control of operations the PM8834 has been designed with dual independent

active-high enable pins (ENABLE_1 and ENABLE_2). Connecting these pins to the GND

pin will disable the corresponding low-side driver.

The PM8834 uses the VCC pin for supply and the GND pin for return.

The dual low-side driver has been designed to work with supply voltage in the range of 5 to

18 V.

For VCC voltages greater than the UVLO threshold (UVLOVCC), the PWM input keeps the

control of the driver operations, provided that the corresponding enable pin is active. Both

PWM_1 and PWM_2 are internally pulled down so, if left floating, the corresponding output

pins are discharged.

The PM8834, during VCC startup, keeps both low-side MOSFETs in an OFF state until the

UVLO threshold is reached.

The input pins (PWM_1, PWM_2, ENABLE_1 and ENABLE_2) are CMOS/TTL-compatible

and can also operate with voltages up to VCC.

The voltage level of the input pins is not allowed to be higher than VCC under any operating

condition.

4.1

Input stage

4.1.1

PWM inputs

The inputs of the PM8834 dual low-side driver are compatible to CMOS/TTL levels with the

capability to be pulled up to VCC.

The relationship between the input pins (PWM_1, PWM_2) and the corresponding PWM

output pins (OUT_1, OUT_2) is depicted in Figure 3. In the worst case, input levels above

2.5 V are recognized as high voltage and values below 0.8 V are recognized as low logic

values. Propagation delays for high-low (tD_HL) and low-high (tD_LH) and rise (tR) and fall

(tR) times have been designed to ensure operation in a fast-switching environment.

Matched propagation delay in the two branches of the PM8834 ensures symmetry in

operation and allows parallel output functionality.

Each PWM input features a 10 µA pull-down to turn off (default state) the external MOSFET

/ IGBT.