AD9913SLASHPCBZ datasheet(9/32 Pages) AD

部品番号	AD9913/PCBZ

部品情報	Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer

PDF	32 Pages

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メーカー	AD [Analog Devices]

ホームページ	http://www.analog.com

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9 / 32 page

Data Sheet

AD9913

Rev. E | Page 9 of 32

–50

–90

250

SYSTEM CLOCK (MHz)

–55

–60

–65

–70

–75

–80

–85

100

150

200

39.88%

26.58%

10.21%

Figure 10. SFDR vs. System Clock Frequency (PLL Bypassed)

–100

–170

100M

FREQUENCY (MHz)

–110

–120

–130

–140

–150

–160

100

10k

100k

10M

92.3MHz

48.9MHz

23.1MHz

6.1MHz

Figure 11. Residual Phase Noise vs. fOUT (PLL Bypassed)

−150

−50

100

100M

FREQUENCY (MHz)

10k

100k

10M

−60

−70

−80

−90

−100

−110

−120

−130

−140

99MHz

12.5MHz

49MHz

25MHz

Figure 12. Absolute Phase Noise vs. fOUT Using the Internal PLL

(REF_CLK 25 MHz × 10 = 250 MHz Using PLL)

–50

–90

00.45

fOUT (% of System Clock)

–55

–60

–65

–70

–75

–80

–85

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

REFSPUR

PLL ×10

BYPASS

Figure 13. SFDR Without the Internal PLL

(REF_CLK = 25 MHz × 10 = 250 MHz Using PLL, 4 mA DAC Full-Scale Current)

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