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ADR02 データシート(PDF) 18 Page - Analog Devices

部品番号 ADR02
部品情報  Complete Dual, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DACs
PDF  33 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADR02 データシート(HTML) 18 Page - Analog Devices

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AD5762R
Preliminary Technical Data
Rev. PrA | Page 18 of 33
7000
3000
4000
5000
6000
2000
–1000
0
1000
–10
10
5
0
–5
SOURCE/SINK CURRENT (mA)
VDD/VSS = ±15V
VDD/VSS = ±12V
TA = 25°C
REFIN = 5V
RISCC = 6kΩ
Figure 25. Source and Sink Capability of Output Amplifier with Positive
Full Scale Loaded
10000
7000
8000
9000
3000
4000
5000
6000
2000
–1000
0
1000
–12
8
3
–2
–7
SOURCE/SINK CURRENT (mA)
15V SUPPLIES
12V SUPPLIES
TA = 25°C
REFIN = 5V
RISCC = 6kΩ
Figure 26. Source and Sink Capability of Output Amplifier with Negative
Full Scale Loaded
CH1 3.00V
M1.00µs
CH1
–120mV
1
VDD/VSS = ±15V
TA = 25°C
REFIN = 5V
1µs/DIV
Figure 27. Full-Scale Settling Time
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–2.0–1.5–1.0–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TIME (µs)
VDD/VSS = ±12V,
REFIN = 5V,
TA = 25°C,
0x8000 TO 0x7FFF,
500ns/DIV
Figure 28. Major Code Transition Glitch Energy, VDD/VSS = ±12 V
CH4 50.0µV
M1.00s
CH4
26µV
4
VDD/VSS = ±15V
MIDSCALE LOADED
REFIN = 0V
50µV/DIV
Figure 29. Peak-to-Peak Noise (100 kHz Bandwidth)
CH1 10.0V BW
CH3 10.0mV BW
T 29.60%
CH2 10.0V
M100µs A CH1
7.80mV
1
2
3
VDD/VSS = ±12V,
REFIN = 5V, TA = 25°C,
RAMP TIME = 100µs,
LOAD = 200pF||10kΩ
T
Figure 30. VOUT vs. VDD/VSS on Power-Up



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