AD5762R

Preliminary Technical Data

Rev. PrA | Page 24 of 33

Table 7. AD5762R Input Register Format

MSB

LSB

DB23

DB22

DB21

DB20

DB19

DB18

DB17

DB16

DB15

DB14

DB13

DB12

DB11

DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

R/W

0

REG2

REG1

REG0

A2

A1

A0

DATA

Table 8. Input Register Bit Functions

Register

Function

R/W

Indicates a read from or a write to the addressed register.

REG2, REG1, REG0

Used in association with the address bits to determine if a read or write operation is to the data register, offset

register, gain register, or function register.

REG2

REG1

REG0

Function

0

0

0

Function Register

0

1

0

Data Register

0

1

1

Coarse Gain Register

1

0

0

Fine Gain Register

1

0

1

Offset Register

A2, A1, A0

These bits are used to decode the DAC channels.

A2

A1

A0

Channel Address

0

0

0

DAC A

0

0

1

DAC B

1

0

0

BOTH DACs

D15:D0

Data Bits.

FUNCTION REGISTER

The function register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine

the function addressed. The functions available via the function register are outlined in Table 9 and Table 10.

Table 9. Function Register Options

REG2

REG1

REG0

A2

A1

A0

DB15:DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

NOP, Data = Don’t Care

0

0

0

0

0

1

Don’t Care

Local-

Ground-

Offset Adjust

D1 Direction

D1

Value

D0

Direction

D0

Value

SDO

Disable

0

0

0

1

0

0

CLR, Data = Don’t Care

0

0

0

1

0

1

LOAD, Data = Don’t Care

Table 10. Explanation of Function Register Options

Option

Description

NOP

No operation instruction used in readback operations.

Local-Ground-

Offset Adjust

Set by the user to enable local-ground-offset adjust function. Cleared by the user to disable local-ground-offset adjust

function (default). Refer to Features section for further details.

D0/D1

Direction

Set by the user to enable D0/D1 as outputs. Cleared by the user to enable D0/D1 as inputs (default). Refer to the Features

section for further details.

D0/D1 Value

I/O Port Status Bits. Logic values written to these locations determine the logic outputs on the D0 and D1 pins when

configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is active as an input. When

enabled as inputs, these bits are don’t cares during a write operation.

SDO Disable

Set by the user to disable the SDO output. Cleared by the user to enable the SDO output (default).

CLR

Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in binary mode.

LOAD

Addressing this function updates the DAC registers and consequently the analog outputs.