L9945 datasheet(6/144 Pages) STMICROELECTRONICS

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The LS/HS configuration is suitable for driving whatever high-side/low-side loads as:

•

Lamps (any channel);

•

ON/OFF electrovalves (any channel);

•

Any safety relevant load (channel 6 has dedicated EN6 enable input);

•

Lambda probe heater (any channel);

•

Limp home functionalities or not safety related loads (channels 7 and 8 not affected by external disable

input).

2.2

Peak & Hold

The device can handle up to two peak & hold loads. There are two possible configurations which can co-exist:

•

P&H1: it involves channels 1 (HS) and 4 (LS) and can be selected through the PH1_config bit

•

P&H2: it involves channels 2 (HS) and 3 (LS) and can be selected through the PH2_config bit

Once a peak & hold configuration is selected through its config bit, the corresponding output channels are

automatically configured according to the pre-determined transistor side. The FET type for the High-Side can be

selected through its N_P_config_xx bit.

Figure 5. Example of peak & hold configuration with NMOS (HS) on channel 1 and NMOS (LS) on channel

GADG2402171042PS

BATT12

HS NMOS

LS NMOS

DRN1

VBATT

GNSP1

SNGP1

RPD

RSH

GND

DFW

CBATT

DRN4

GNSP4

SNGP4

RPD

RSH

DZFB

DFB

PGND34

GND

CESD

GND

OUT4

OUT1

CESD

RFB

VBATT

BATT34

Figure 5 shows an example of P&H1 configuration with NMOS transistor on the High-Side. Refer to this

schematic in order to understand how the external FETs must be mounted with respect to the DRNx/GNSPx/

SNGPx/PGNDx/BATTx pins.

In case of PMOS on the High-Side, refer to Figure 3 in order to understand the DRNx/GNSPx/SNGPx/BATTx pin

connection.

L9945

Output configurations

DS12275 - Rev 10

page 6/144

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