L9945 datasheet(40/144 Pages) STMICROELECTRONICS

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5.9

Serial Peripheral Interface (SPI)

The device is equipped with a Serial Peripheral Interface implementing a 32-bit, synchronous, full duplex, serial

protocol. The interface is used to configure the device by programming its internal registers. Device status and

diagnostic information can also be read via SPI.

5.9.1

SPI Quick Look

Table 27. SPI quick look

Parameter

Value

Frame length

32 bit or multiple

SPI Mode

Mode 1 (CPOL = 0 & CPHA = 1)

Max Frequency

5 MHz

Protocol

Out of frame

Chip Select Signal Active State

Active Low

Endianess

MSB first

The SPI can work in two different ways: parallel operation and daisy chain. These two methods can co-exist, as

shown in Figure 20, where a parallel communication is implemented between a master device and three sub-

blocks. Two of them are daisy chains while the last one is made of a single device. In the example, three Chip

Select (CS) wires are used for communicating with 6 devices.

5.9.2

Parallel operation

In parallel operation the communication is performed between a device, named master and one or more devices,

named slaves. The master can start/stop the communication and generates the clock signal. Each slave device

has a dedicated chip select (CS) signal, used to address the communication between the master and the selected

slave.

5.9.3

Daisy chain

In daisy chain configuration, master device can communicate with several slaves using only one wire for chip

select (CS). All the slaves in the daisy chain are selected when the CS is in the active state. The serial output line

of every slave is connected to the serial input line of the following device. This means that data shifted out by a

device is shifted in the following one. For instance, after each 32 clock chunk, an entire frame is transferred from

a slave to another. Example given, if a three devices chain is implemented, after 96 clock pulses, the master will

program the slaves by shifting out three different frames (each one made up of 32 bits). The first frame shifted out

of the master will reach the last device of the chain, the second frame will reach the mid device while the third

frame will be shifted into the first member of the chain (refer to Figure 21).

L9945

Functional description

DS12275 - Rev 10

page 40/144

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