データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

ST10R172L データシート(PDF) 51 Page - STMicroelectronics

部品番号 ST10R172L
部品情報  16-BIT LOW VOLTAGE ROMLESS MCU
PDF  68 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10R172L データシート(HTML) 51 Page - STMicroelectronics

Back Button ST10R172L Datasheet HTML 47Page - STMicroelectronics ST10R172L Datasheet HTML 48Page - STMicroelectronics ST10R172L Datasheet HTML 49Page - STMicroelectronics ST10R172L Datasheet HTML 50Page - STMicroelectronics ST10R172L Datasheet HTML 51Page - STMicroelectronics ST10R172L Datasheet HTML 52Page - STMicroelectronics ST10R172L Datasheet HTML 53Page - STMicroelectronics ST10R172L Datasheet HTML 54Page - STMicroelectronics ST10R172L Datasheet HTML 55Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 51 / 68 page
background image
51/68
ST10R172L - ELECTRICAL CHARACTERISTICS
Data hold after WR
t24
CC
5 +
tF
TCL - 5 +
tF
–ns
ALE rising edge after RD,
WR
t26
CC
-5 +
tF
-5 +
tF
–ns
Address hold after RD, WR
t28
CC
0 (no tF)
-9+
tF (tF>0)
0 (no
tF)
-9+
tF (tF>0)
–ns
Address hold after WRH
t28h CC
-1 (no tF)
-8 +tF (tF>0)
-1 (no
tF)
-8 +
tF (tF>0)
–ns
Latched CS setup to ALE
t38
CC
-7 +
tA
3 +
tA
-7 +
tA
3 +
tA
ns
Unlatched CS setup to ALE t38u CC
3 +
tA
TCL - 7 +
tA
–ns
Latched CS low to Valid
Data In
t39
SR
13
+
tC + 2tA
3TCL - 17
+
tC + 2tA
ns
Unlatched CS low to Valid
Data In
t39u SR
23
+
tC + 2tA
4TCL - 17
+
tC + 2tA
ns
Latched CS hold after RD,
WR
t41
CC
3 +
tF
TCL - 7 +
tF
–ns
Unlatched CS hold after RD,
WR
t41u CC
0 (no tF)
-7 +tF (tF>0)
0 (no
tF)
-7 +
tF (tF>0)
–ns
Address setup to RdCs,
WrCs (with RW-delay)
t82
CC
13 +
2tA
2TCL - 7 +
2tA –ns
Address setup to RdCs,
WrCs (no RW-delay)
t83
CC
3 +
2tA
TCL - 7 +
2tA –ns
RdCS to Valid Data In
(with RW-delay)
t46
SR
3 +
tC
2TCL - 17 +
tC ns
RdCS to Valid Data In
(no RW-delay)
t47
SR
13 +
tC
3TCL - 17 +
tC ns
RdCS, WrCS Low Time
(with RW-delay)
t48
CC
11 +
tC
2TCL - 9 +
tC –ns
RdCS, WrCS Low Time
(no RW-delay)
t49
CC
21 +
tC
3TCL - 9 +
tC –ns
Data valid to WrCS
t50
CC
13 +
tC
2TCL - 7 +
tC –ns
Parameter
Symbol
Max CPU Clock 50MHz
Variable CPU Clock
1/2TCL = 1 to 50 MHz
min.
max.
min.
max.
Table 15 Demultiplexed bus
1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com