STLC1502 datasheet(41/81 Pages) STMICROELECTRONICS

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STLC1502

7.5 SPI-Serial Peripheral Interface

The Serial Peripheral Interface (SPI) allows full-duplex, synchronous, serial communication with external

devices. An SPI system may consist of a master and one or more slaves or a system in which devices

may be either masters or slaves.

The SPI is normally used for communication between the microcontroller and external peripherals.

7.5.1 Main Features

•

Full duplex, three-wire synchronous transfers

•

Master mode operation (clock generation)

•

Four master mode frequencies

•

Four programmable master bit rates

•

Programmable clock polarity and phase

•

End of transfer interrupt flag

•

Write collision flag protection

•

Master mode fault protection capability.

The SPI is connected to external devices through 3 pins:

SMI: Master In

SMO: Master Out

SCK: Serial Clock pin

Int Base + 0x28

IRQSourceSel

R/W

Select the test mode of the IRQ

cause on the interrupt control-

ler (if the bit 0 is set). In this

case

the

IRQTestSource

becomes the interrupt source

cause.

Int.Base + 0x2C

FIQTestSource

R/W

Usable when the bit 0 of the

FIQSourceSel is set to one. In

this case this register is the

interrupt source cause. If set,

the cause is active (interrupt

generated) while if reset, the

cause is not active.

Int Base + 0x30

FIQSourceSel

R/W

Select the test mode of the FIQ

cause on the interrupt control-

ler (if the bit 0 is set). In this

case

the

FIQTestSource

becomes the interrupt source

cause. Moreover this register

contains also the selection for

the FIQ interrupt cause.

Address

R/W

Notes

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