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HD64F2149YV データシート(PDF) 941 Page - Renesas Technology Corp |
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HD64F2149YV データシート(HTML) 941 Page - Renesas Technology Corp |
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941 / 1075 page  Appendix B Internal I/O Registers Rev. 3.00 Jan 18, 2006 page 913 of 1044 REJ09B0280-0300 KBCRL0—Keyboard Control Register L0 H'FED9 Keyboard Buffer Controller KBCRL1—Keyboard Control Register L1 H'FEDD Keyboard Buffer Controller KBCRL2—Keyboard Control Register L2 H'FEE1 Keyboard Buffer Controller KBE RXCR2 RXCR1 RXCR0 KCLKO KDO — RXCR3 Bit Initial value Read/Write 7 654 32 1 0 0 111 00 00 R/W R R R R/W R/W — R Receive counter RXCR2 RXCR1 0 1 0 1 0 1 0 1 0 1 — RXCR0 0 1 0 1 0 1 0 1 0 1 0 1 — RXCR3 0 1 Receive data contents — Start bit KB0 KB1 KB2 KB3 KB4 KB5 KB6 KB7 Parity bit — — Keyboard data out 0 Keyboard buffer controller data I/O pin is low 1 Keyboard buffer controller data I/O pin is high Keyboard clock out 0 Keyboard buffer controller clock I/O pin is low 1 Keyboard buffer controller clock I/O pin is high Keyboard enable 0 Loading of receive data into KBBR is disabled 1 Loading of receive data into KBBR is enabled |
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