データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

CDCE62002 データシート(PDF) 5 Page - Texas Instruments

Click here to check the latest version.
部品番号 CDCE62002
部品情報  Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
PDF  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

CDCE62002 データシート(HTML) 5 Page - Texas Instruments

  CDCE62002 Datasheet HTML 1Page - Texas Instruments CDCE62002 Datasheet HTML 2Page - Texas Instruments CDCE62002 Datasheet HTML 3Page - Texas Instruments CDCE62002 Datasheet HTML 4Page - Texas Instruments CDCE62002 Datasheet HTML 5Page - Texas Instruments CDCE62002 Datasheet HTML 6Page - Texas Instruments CDCE62002 Datasheet HTML 7Page - Texas Instruments CDCE62002 Datasheet HTML 8Page - Texas Instruments CDCE62002 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 49 page
background image
Interface and Control Block
Device
Hardware
StaticRAM DeviceRegisters
Register 0
Register 1
Register 2
Interface
&
Control
PD
SPI_ LE
SPI_ CLK
SPI_ MOSI
SPI_ MISO
EEPROM
DeviceRegisters
Register 0
Register 1
Register 2
Input Block
REF_IN
XTAL/
AUX_IN
LVPECL /LVDS 500 MHz
LVCMOS 250 MHz
Crystal : 2 MHz – 42 MHz
SingleEnded : 2 MHz - 75 MHz
Synthesizer
Reference
SmartMUX
Control
ReferenceDivider
/1 - /8
CDCE62002
www.ti.com.............................................................................................................................................................. SCAS882A – JUNE 2009 – REVISED JULY 2009
The CDCE62002 is a highly flexible and configurable architecture and as such contains a number of registers so
that the user may specify device operation. The contents of nine 28-bit wide registers implemented in static RAM
determine device configuration at all times. On power-up, the CDCE62002 copies the contents of the EEPROM
into the RAM and the device begins operation based on the default configuration stored in the EEPROM.
Systems that do not have a host system to communicate with the CDCE62002 use this method for device
configuration. The CDCE62002 provides the ability to lock the EEPROM; enabling the designer to implement a
fault tolerant design. After power-up, the host system may overwrite the contents of the RAM via the SPI (Serial
Peripheral Interface) port. This enables the configuration and reconfiguration of the CDCE62002 during system
operation. Finally, the device offers the ability to copy the contents of the RAM into EEPROM, if the EEPROM is
unlocked.
Figure 3. CDCE62002 Interface and Control Block
The Input Block includes one Universal Input Buffer and an Auxiliary Input. The Input Block buffers the incoming
signals and facilitates signal routing to the Internal Synthesizer Block via the smart multiplexer (called the Smart
MUX). The CDCE62002 can divide the REF_IN signal via the dividers present on the inputs of the first stage of
the Smart MUX.
Figure 4. CDCE62002 Input Block
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): CDCE62002



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com