Analog Integrated Circuit Device Data



Freescale Semiconductor

34

33813

More accurate current control can be provided by placing a current sense resistor between the IGNSENSP and IGNSENSN pins.

When both pre-drivers are used as ignition (IGBT) pre-drivers, the both pre-drivers can share one current sense resistor. The

input controls will determine the value of the current sense threshold voltage across the current sense resistor. When either one

5.1.40 RESETB

The RESETB pin is a 5.0 volt logic, low level output that is used to reset the MCU. The RESETB pin is an open drain output.

Without power on the 33813 circuit, the RESETB pin is held low by an internal pull-down resistor. In a typical application, the

RESETB pin must be pulled up externally by a pull-up resistor to VCC

When power is applied to the circuit and the voltage on

the VCC pin reaches the lower voltage threshold, the RESETB pin will remain at a low level (open drain FET turned on) for a

pulse is generated due to any of the following events:

1. A watchdog timer timeout event occurs,

2. An under-voltage event on VCC occurs, or

3. An over-voltage event on VPWR occurs.

A Power On Reset (POR) is always provided upon power ON (i.e. anytime the IC goes from sleep state to active state).

5.1.41 Disabling the Watchdog Timer

Since a watchdog reset occurs, by default 10 seconds after the POR, if the MCU needs to programmed in-circuit, a means of

disabling the watchdog must be provided to avoid interrupting the MCU programming procedure. This disable mechanism can

be a jumper between the RESETB pin of the 33813 and the MCU’s Reset input pin, or via an isolation resistor placed between

the RESETB pin on the 33813 and the MCU’s reset input pin that allows the MCU’s reset pin to be pulled high independently of

the 33813 RESETB. The watchdog can also be disabled via a bit in the SPI WD configuration register.

5.1.42 Internal Reset

There is a bit in the SPI control register that is labelled “Reset”. When this bit is set to a one (1) by the MCU, it will instruct the

33813 to perform an internal reset. This reset will NOT toggle the RESETB output pin, but will cause all internal registers to be

initialized back to their default values, including clearing the reset bit in the SPI control register.

5.2

MCU SPI Interface Description

The 33813 device directly interfaces to a 5.0 V micro controller unit (MCU) using a 16-bit serial peripheral interface (SPI) protocol.

SPI serial clock frequencies up to 8.0 MHz may be used when programming and reading output status information (production

tested at 1.0 MHz). Figure 16 illustrates the SPI configuration between an MCU and one 33813.

Data is sent to the 33813 device through the SI input pin. As data is being clocked into the SI pin, other data is being clocked out

of the device by the SO output pin. The response data received by the MCU during SPI communication depends on the previous

SPI message sent to the device. The SPI can be used to read or write data to the configuration and control registers and to read

or write the data contained in the status registers.

The MCU is only allowed to read or clear bits (write zeros) in the status register unless the POST enable bit in the control register

is set. When the POST enable bit is set the MCU can read and write zeros or ones to the status register.

Note that the MCU must clear the POST enable bit before operation is resumed or the status register will not be updated with

fault indications.