33813 datasheet(35/54 Pages) FREESCALE

35 / 54 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

33813

5.2.1

SPI Integrity Check

One SPI word is reserved as a SPI check message. When bits 12 through 15 are all zero, then the SPI will echo the remaining

12-bit SPI word sent and will flip bits 12 through 14, bit 15 will remain a 0. This allows the MCU to poll the SPI and compare the

received message to confirm the integrity of the SPI communication channel to the 33813. There is a SPI error bit in the SPI

status register that indicates if an incorrect SPI message has been received. The SPI error bit in the SPI status register is set

whenever any SPI message error is detected.

Important A SCLK pulse count strategy has been implemented to ensure integrity of SPI communications. Only SPI messages

consisting of 16 SCLK pulses will be acknowledged. SPI messages consisting of other than 16 SCLK pulses will be ignored by

the device and reported as a SPI error. Invalid SPI messages, that contain invalid commands or addresses will also be flagged

as a SPI error.

Figure 16. SPI Interface with Microprocessor

Two or more 33813 devices may be used in a module system. Multiple ICs may be SPI configured in parallel only. Figure 17

demonstrates the configuration.

Figure 17. SPI Parallel Interface (Only) with Microprocessor

33813

Micro controller

Receive

Buffer

Parallel

Ports

To Logic

16-Bit Shift Register

Shift Register

MOSI

MISO

SCLK

Parallel

Ports

Micro controller

33813

33879A

SCLK

CSB

SCLK

CSB

SCLK

MISO

MOSI

Shift Register

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