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DAC5687IPZP データシート(PDF) 29 Page - Texas Instruments

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部品番号 DAC5687IPZP
部品情報  16-BIT, 500 MSPS 2?? INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  79 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

DAC5687IPZP データシート(HTML) 29 Page - Texas Instruments

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Register Name: NCO_PHASE_1—Address: 0x0E, Default = 0x00
Register Name: DACA_OFFSET_0—Address: 0x0F, Default = 0x00
Register Name: DACB_OFFSET_0—Address: 0x10, Default = 0x00
Register Name: DACA_OFFSET_1—Address: 0x11, Default = 0x00
Register Name: DACB_OFFSET_1—Address: 0x12, Default = 0x00
Register Name: QMCA_GAIN_0—Address: 0x13, Default = 0x00
DAC5687
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
BIT 7
BIT 0
phase(15:8)
0
0
0
0
0
0
0
0
phase(15:8): Bits 15:8 of the NCO phase offset word.
BIT 7
BIT 0
daca_offset(7:0)
0
0
0
0
0
0
0
0
daca_offset(7:0): Bits 7:0 of the DAC A offset word.
BIT 7
BIT 0
dacb_offset(7:0)
0
0
0
0
0
0
0
0
dacb_offset(7:0): Bits 7:0 of the DAC B offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
daca_offset(12:8)
unused
unused
unused
0
0
0
0
0
0
0
0
daca_offset(12:8): Bits 12:8 of the DAC A offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
dacb_offset(12:8)
unused
unused
unused
0
0
0
0
0
0
0
0
dacb_offset(12:8): Bits 12:8 of the DAC B offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
qmc_gain_a(7:0)
0
0
0
0
0
0
0
0
qmc_gain_a(7:0): Bits 7:0 of the QMC A path gain word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
Copyright © 2005–2006, Texas Instruments Incorporated
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Product Folder Link(s): DAC5687



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