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CS4953 データシート(PDF) 28 Page - Cirrus Logic |
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CS4953 データシート(HTML) 28 Page - Cirrus Logic |
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28 / 44 page ![]() CS4952/53 28 DS223PP2 Register Description A set of internal registers are available for control- ling the operation of the CS4952/3. The registers extend from internal address 0x00 through 0x3D. Table 5 shows a complete list of these registers and their internal addresses. Note that this table and the subsequent register description section describe the full register map for CS4952 only. A complete CS4953 register set description is only available to Macrovision ACP-PPV Licensed Buyers. Address Register Name Type Default Value 0x00 CONTROL_0 r/w 01h 0x01 CONTROL_1 r/w 04h 0x02 CONTROL_2 r/w 00h 0x03 RESERVED 0x04 DAC r/w F0h 0x05 - 0x06 RESERVED 0x07 STATUS read only 00h 0x08 BKG_COLOR r/w 03h 0x09 GPIO_CTRL_REG r/w 0x0A GPIO_DATA_REG r/w 00h 0x0B - 0x0C RESERVED 0x0D C_AMP r/w 80h 0x0E Y_AMP r/w 80h 0x0F I2C_ADR r/w n/a 0x10 SC_AMP r/w 1Ch 0x11 SC_SYNTH0 r/w 3Eh 0x12 SC_SYNTH1 r/w F8h 0x13 SC_SYNTH2 r/w E0h 0x14 SC_SYNTH3 r/w 43h 0x15 HUE_LSB r/w 00h 0x16 HUE_MSB r/w 00h 0x17 RESERVED 0x18 CC_EN r/w 00h 0x19 CC_21_1 r/w 00h 0x1A CC_21_2 r/w 00h 0x1B CC_284_1 r/w 00h 0x1C CC_284_2 r/w 00h 0x1D - 0x3A RESERVED 0x3B INT_EN r/w 00h 0x3C INT_CLR r/w 00h 0x3D ID_REG read only n/a Table 5. Control Register Map |
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