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MPC7457 データシート(PDF) 55 Page - Freescale Semiconductor, Inc |
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MPC7457 データシート(HTML) 55 Page - Freescale Semiconductor, Inc |
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55 / 71 page ![]() System Design Information MPC7457 RISC Microprocessor Hardware Specifications, Rev. 8 Freescale Semiconductor 55 response time necessary. They should also be connected to the power and ground planes through two vias to minimize inductance. Suggested bulk capacitors: 100–330 µF (AVX TPS tantalum or Sanyo OSCON). 9.4 Connection Recommendations To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal level. Unused active low inputs should be tied to OVDD. Unused active high inputs should be connected to GND. All NC (no-connect) signals must remain unconnected. Power and ground connections must be made to all external VDD, OVDD, GVDD, and GND pins in the MPC7457. If the L3 interface is not used, GVDD should be connected to the OVDD power plane, and L3VSEL should be connected to BVSEL; the remainder of the L3 interface may be left unterminated. 9.5 Output Buffer DC Impedance The MPC7457 processor bus and L3 I/O drivers are characterized over process, voltage, and temperature. To measure Z0, an external resistor is connected from the chip pad to OVDD or GND. Then, the value of each resistor is varied until the pad voltage is OVDD/2 (see Figure 25). The output impedance is the average of two components, the resistances of the pull-up and pull-down devices. When data is held low, SW2 is closed (SW1 is open), and RN is trimmed until the voltage at the pad equals OVDD/2. RN then becomes the resistance of the pull-down devices. When data is held high, SW1 is closed (SW2 is open), and RP is trimmed until the voltage at the pad equals OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each other in value. Then, Z0 = (RP + RN)/2. Figure 25. Driver Impedance Measurement Table 21 summarizes the signal impedance results. The impedance increases with junction temperature and is relatively unaffected by bus voltage. OVDD OGND RP RN Pad Data SW1 SW2 |
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