AN2021 datasheet(31/39 Pages) STMICROELECTRONICS

31 / 39 page

AN2021

New registers

31/39

Of course, XPEREMU must be programmed after XPERCON and after SYSCON. In this

way, the final configuration for XPeripherals is stored in XPEREMU and used for the

emulation hardware setup.

4.3

Emulation-dedicated registers

A set of four additional registers is implemented for emulation purposes only. Similarly to the

XPEREMU, they are write-only registers.

XEMU0 (00’EB76h)

XEMU1 (00’EB78h)

XEMU2 (00’EB7Ah)

XEMU3 (00’EB7Ch)

These registers are used by emulators. They have no user action on the ST10F272.

4.3.1

Hardware impact

None.

4.3.2

Software impact

None. On the ST10F269, the 00’E800h to 00’EBFFh address range was mapped to external

memory but is recommended to reserve this space for upward compatibility.

4.4

XMISC register

This register has been created to handle some additional functionalities. To have access to

this register, the XMISCEN bit, that is, bit 10 of XPERCON, must be set.

ST10F272: XMISC (EB46h)

XREG

Reset value: 0000h

987654

Reserved

VREG

OFF

CAN

CK2

CAN

PAR

ADC

MUX

R/W

Table 18.

XMISC register description

Bit

Bit name

Function

15:4

Reserved

3VREGOFF

Main Voltage Regulator disable in Power-Down mode

0: Default value after reset and when Power-Down is not used

1: On-chip Main Regulator is turned off when Power-Down mode is entered

CANCK2

CAN Clock divider by 2 disable

0: Clock provided to CAN modules is CPU clock divided by 2 (mandatory

when fCPU is higher than 40 MHz)

1: Clock provided to CAN modules is directly CPU clock

AN2021 データシート(PDF) 31 Page - STMicroelectronics

AN2021 データシート(HTML) 31 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

データシートダウンロード