ST9 datasheet(57/146 Pages) STMICROELECTRONICS

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ST9 USER GUIDE

3.5.2 How the DMA Works

The DMA consists of a transfer between a memory or register file and a peripheral, in either di-

rection. Assuming the peripheral is configured to handle externally supplied data or to provide

data to external circuits, two steps are needed for a transfer to occur.

The transfer must be requested by some event or condition.

A mechanism must handle reading the data from one part and writing to the other part.

The term DMA transfer represents the transfer of a single byte of data. Usually, more than one

byte is transferred and the transfer occurs in bursts. Thus, a third step is involved:

A mechanism that counts the transfers and stops them when the count is finished.

To the programmer, these mechanisms appear as registers to be properly initialized. The

three steps are handled as follows (see Figure 23).

3.5.2.1 Transfer Requests

The DMA transfer is requested in exactly the same way as an interrupt is requested. Ac-

cording to its type, the peripheral concerned sends a request based on an external event such

as a character received or transmitted by the Serial Channel Interface. You configure this in

the registers belonging to the peripheral involved. Special bits in the registers indicate that the

peripheral ready status, instead of requesting an interrupt, requests a DMA transfer.

3.5.2.2 Transfer Execution

A DMA transfer can involve a memory location or a register in the register file. In any case, the

transfer requires an address and a counter. This address and counter are stored in registers

which you can define anywhere in the register file. The address register value is automatically

incremented after each transfer and the counter register value is decremented so that the next

transfer will involve the next address and this mechanism will continue until the counter is

equal to 0. Depending on whether the transfer addresses memory or the register file, there are

two cases.

If the transfer addresses the register file, the address register and the counter register are

single registers (a byte is enough to address 256 registers). The address of this address reg-

ister is stored in one of the peripheral's registers, named DCPR. The low bit (RM) of this reg-

ister is set to zero indicating that the register file is involved in the transfer. The address reg-

ister must have an even address to address the DMA address, the next register storing the

DMA transaction counter.

If the transfer addresses the memory, the registers that hold the address and the counter must

be two double registers. In this case, the DMA address is pointed by the DAPR pointer register

and the DMA transaction counter is pointed by the DCPR pointer register. The low bit of the

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