AR0130CSSC00SPBA0-DR datasheet(8/53 Pages) ONSEMI

8 / 53 page

AR0130 DS Rev. L Pub. 6/15 EN

©Semiconductor Components Industries, LLC, 2015.

AR0130: 1/3-Inch CMOS Digital Image Sensor

Functional Overview

Table 3:

Pad Descriptions

Name

Type

Description

STANDBY

Input

Standby-mode enable pin (active HIGH).

VDD_PLL

Power

PLL power.

VAA

Power

Analog power.

EXTCLK

Input

External input clock.

VDD_SLVS

Power

Digital power (do not connect).

DGND

Power

Digital ground.

VDD

Power

Digital power.

AGND

Power

Analog ground.

SADDR

Input

Two-Wire Serial Interface address select.

SCLK

Input

Two-Wire Serial Interface clock input.

SDATA

I/O

Two-Wire Serial Interface data I/O.

VAA_PIX

Power

Pixel power.

LINE_VALID

Output

Asserted when DOUT line data is valid.

FRAME_VALID

Output

Asserted when DOUT frame data is valid.

PIXCLK

Output

Pixel clock out. DOUT is valid on rising edge of this clock.

VDD_IO

Power

I/O supply power.

DOUT8

Output

Parallel pixel data output.

DOUT9

Output

Parallel pixel data output.

DOUT10

Output

Parallel pixel data output.

DOUT11

Output

Parallel pixel data output (MSB)

Reserved

Input

Connect to DGND.

DOUT4

Output

Parallel pixel data output.

DOUT5

Output

Parallel pixel data output.

DOUT6

Output

Parallel pixel data output.

DOUT7

Output

Parallel pixel data output.

TRIGGER

Input

Exposure synchronization input.

OE_BAR

Input

Output enable (active LOW).

DOUT0

Output

Parallel pixel data output (LSB)

DOUT1

Output

Parallel pixel data output.

DOUT2

Output

Parallel pixel data output.

DOUT3

Output

Parallel pixel data output.

RESET_BAR

Input

Asynchronous reset (active LOW). All settings are restored to factory default.

FLASH

Output

Flash control output.

Input

Do not connect.

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