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AR0130CSSC00SPBA0-DR データシート(PDF) 16 Page - ON Semiconductor |
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AR0130CSSC00SPBA0-DR データシート(HTML) 16 Page - ON Semiconductor |
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16 / 53 page ![]() AR0130 DS Rev. L Pub. 6/15 EN 16 ©Semiconductor Components Industries, LLC, 2015. AR0130: 1/3-Inch CMOS Digital Image Sensor Output Data Format Note: The AR0130 uses column parallel analog-digital converters; thus short line timing is not possible. The minimum total line time is 1390 columns (horizontal width + horizontal blanking). The mini- mum horizontal blanking is 110. Exposure Total integration time is the result of Coarse_Integration_Time and Fine_Integration_- Time registers, and depends also on whether manual or automatic exposure is selected. The actual total integration time, tINT is defined as: tINT = tINTCoarse - 410 - tINTFine (EQ 2) = (number of lines of integration x line time) - (410 pixel clocks of conversion time over- head) - (number of pixels of integration x pixel time) where: – Number of Lines of Integration (Auto Exposure Control: Enabled) When automatic exposure control (AEC) is enabled, the number of lines of integra- tion may vary from frame to frame, with the limits controlled by R0x311E (mini- mum auto exposure time) and R0x311C (maximum auto exposure time). – Number of Lines of Integration (Auto Exposure Control: Disabled) If AEC is disabled, the number of lines of integration equals the value in R0x3012 (context A) or R0x3016 (context B). – Number of Pixels of Integration The number of fine shutter width pixels is independent of AEC mode (enabled or disabled): • Context A: the number of pixels of integration equals the value in R0x3014. • Context B: the number of pixels of integration equals the value in R0x3018. Typically, the value of the Coarse_Integration_Time register is limited to the number of lines per frame (which includes vertical blanking lines), such that the frame rate is not affected by the integration time. For more information on coarse and fine integration time settings limits, please refer to the Register Reference document. Table 5: Frame Time: Long Integration Time Parameter Name Equation (Number of Pixel Clock Cycles) Default Timing at 74.25 MHz F’ Total frame time (long integration time) Context A: (R0x3012 x (A + Q)) + R0x3014 + P1 + P2 Context B: (R0x3016 x (A + Q)) + V R0x3018 + P1 + P2 3,300,012 pixel clocks = 44.44ms |
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