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STM32L063C8 データシート(PDF) 89 Page - STMicroelectronics

部品番号 STM32L063C8
部品情報  Ultra-low-power platform
PDF  121 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
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STM32L063C8 データシート(HTML) 89 Page - STMicroelectronics

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STM32L063x8
Electrical characteristics
107
Figure 24. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 61. Otherwise the reset will not be taken into account by the device.
6.3.15
12-bit ADC characteristics
Unless otherwise specified, the parameters given in Table 62 are derived from tests
performed under ambient temperature, fPCLK frequency and VDDA supply voltage conditions
summarized in Table 24: General operating conditions.
Note:
It is recommended to perform a calibration after each power-up.
Table 62. ADC characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Analog supply voltage for
ADC on
Fast channel
1.65
-
3.6
V
Standard channel
1.75(1)
-3.6
IDDA (ADC)
Current consumption of the
ADC on VDDA
1.14 Msps
-
200
-
µA
10 ksps
-
40
-
Current consumption of the
ADC on VDD(2)
1.14 Msps
-
70
-
10 ksps
-
1
-
fADC
ADC clock frequency
Voltage scaling Range 1
0.14
-
16
MHz
Voltage scaling Range 2
0.14
-
8
Voltage scaling Range 3
0.14
-
4
fS(3)
Sampling rate
12-bit resolution
0.01
-
1.14
MHz
fTRIG(3)
External trigger frequency
fADC = 16 MHz,
12-bit resolution
-
-
941
kHz
--
-
17
1/fADC
VAIN
Conversion voltage range
-
0
-
VDDA
V
RAIN(3)
External input impedance
See Equation 1 and
Table 63 for details
--
50
k
RADC(3)(4)
Sampling switch resistance
-
-
-
1
k
CADC(3)
Internal sample and hold
capacitor
--
-
8
pF



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