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STM32L063C8 データシート(PDF) 30 Page - STMicroelectronics |
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STM32L063C8 データシート(HTML) 30 Page - STMicroelectronics |
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30 / 121 page ![]() Functional overview STM32L063x8 30/121 DocID025660 Rev 6 The highly flexible routing interface allows the application firmware to control the routing of different I/Os to the TIM2, TIM21, TIM22 and LPTIM timer input captures. It also controls the routing of internal analog signals to the USB internal oscillator, ADC, COMP1 and COMP2 and the internal reference voltage VREFINT. 3.17 Touch sensing controller (TSC) The STM32L063x8 provide a simple solution for adding capacitive sensing functionality to any application. These devices offer up to 24 capacitive sensing channels distributed over 8 analog I/O groups. Capacitive sensing technology is able to detect the presence of a finger near a sensor which is protected from direct touch by a dielectric (such as glass, plastic). The capacitive variation introduced by the finger (or any conductive object) is measured using a proven implementation based on a surface charge transfer acquisition principle. It consists of charging the sensor capacitance and then transferring a part of the accumulated charges into a sampling capacitor until the voltage across this capacitor has reached a specific threshold. To limit the CPU bandwidth usage, this acquisition is directly managed by the hardware touch sensing controller and only requires few external components to operate. The touch sensing controller is fully supported by the STMTouch touch sensing firmware library, which is free to use and allows touch sensing functionality to be implemented reliably in the end application. Table 8. Capacitive sensing GPIOs available on STM32L063x8 devices Group Capacitive sensing signal name Pin name Group Capacitive sensing signal name Pin name 1 TSC_G1_IO1 PA0 5 TSC_G5_IO1 PB3 TSC_G1_IO2 PA1 TSC_G5_IO2 PB4 TSC_G1_IO3 PA2 TSC_G5_IO3 PB6 TSC_G1_IO4 PA3 TSC_G5_IO4 PB7 2 TSC_G2_IO1 PA4 6 TSC_G6_IO1 PB11 TSC_G2_IO2 PA5 TSC_G6_IO2 PB12 TSC_G2_IO3 PA6 TSC_G6_IO3 PB13 TSC_G2_IO4 PA7 TSC_G6_IO4 PB14 3 TSC_G3_IO1 PC5 7 TSC_G7_IO1 PC0 TSC_G3_IO2 PB0 TSC_G7_IO2 PC1 TSC_G3_IO3 PB1 TSC_G7_IO3 PC2 TSC_G3_IO4 PB2 TSC_G7_IO4 PC3 4 TSC_G4_IO1 PA9 8 TSC_G8_IO1 PC6 TSC_G4_IO2 PA10 TSC_G8_IO2 PC7 TSC_G4_IO3 PA11 TSC_G8_IO3 PC8 TSC_G4_IO4 PA12 TSC_G8_IO4 PC9 |
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