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MC33592 データシート(PDF) 5 Page - NXP Semiconductors

部品番号 MC33592
部品情報  315MHz, 434MHz Bands
PDF  28 Pages
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

MC33592 データシート(HTML) 5 Page - NXP Semiconductors

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COMMUNICATION PROTOCOL
MOTOROLA
MC33592 Technical Data
5
COMMUNICATION PROTOCOL
MANCHESTER CODING DESCRIPTION
Manchester coding is defined as follows: data is sent during the first half-bit, complementary data is sent
during the second half-bit.
Figure 3 : Manchester coding example
The signal average value is constant. This allows clock recovery from the data stream itself. In order to
achieve a correct clock recovery, Manchester coded data must have a duty cycle between 48% and 52%.
PREAMBLE, ID, HEADER WORDS AND MESSAGE DESCRIPTION
The following description applies if the Data Manager is enabled (DME=1).
The ID word is a Manchester coded byte whose content has been previously loaded in the Configuration
Register 2. The complement of the ID word is recognized as an ID word. ID word is sent at the same data rate as
data.
A preamble is required:
- before ID,
- before Header if HE=1,
- before data if HE=0.
It enables AGC to settle, and clock recovery. Figure 4 defines the Preamble word. Preamble content must be
carefully defined in order not to be decoded as an ID or Header word.
Figure 4 : Preamble definition
The Header word is a 4 bit Manchester coded message ‘0110’ or its complement sent at the selected data
rate. This bit sequence and its complement must not be found in the sequence preamble and ID word.
Data must follow the Header without any delay.
Data are completed by a End-of-Message (EOM) word, consisting of 2 NRZ consecutive ones or zeroes. If the
complement of the Header word is received, output data are complemented too.
The following example shows a complete message with Preamble, ID, Header words followed by 2 data bits,
and an EOM. The preamble is placed at the beginning of both ID and Header words.
0
0
0
11
1
0
Original data
Manchester coded
‘0’ Manchester
at data rate
‘1’ NRZ > 200µs
i.e.:
2 ‘1’ NRZ at 9.6kBd,
1 ‘1’ NRZ at 4.8kBd
AGC settling time
Clock recovery
ID
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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