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FS970X データシート(PDF) 23 Page - Fortune Semiconductor Corp. |
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FS970X データシート(HTML) 23 Page - Fortune Semiconductor Corp. |
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23 / 46 page ![]() FS970X Rev. 4.4 23/46 As shown in Graph 7, the AC signal, inputting from RCTP and going through the rectifier, will obtain a full differential amplifier signal from ACHO and ACLO. It will then be connected to an external RC low-pass filter network to do the arithmetic average. The result value, a absolute average AC/DC voltage, then flows into ADC and displays. The full-wave rectifier of FS970X has built in the required resistor. And the rectifier diode is controlled by EXTD to select built-in or externally connected. When EXTD=0, it means that the bandwidth of the built-in diode is 3kHz under precision of 1%. When EXTD=1, it means that the bandwidth of the external diode using 1N914 is 10kHz under precision of 1%. It can increases the bandwidth of the rectifier if using faster diode or adding a high-frequency compensation circuitry of full-wave rectifier. The enable capability of the rectifier is controlled by RCTEN. When RCTEN is Lo, turning off the operation amplifier will save power consumption. CMP1 CMP1EN ENSCHMT CMPH FCNT/ CAPTG CPL CMP1 62 Graph 8. Comparator Block-diagram. As shown in Graph 8, comparator CMP1 can directly set the enable action of control register CMPEN1. And the Schmidt trigger function of the comparator can be selected by enable ENSCHMT. When ENSCHMT=0, the comparator has no delay, suitable for capacity measurement. When ENSCHMT=1, the comparator has the delay voltage of approx. 0.1VRMS, suitable for frequency measurement. The negative input is CPL, as shown in Chart 14. The positive input is CMPH, as shown in Chart 13. The output flows directly into frequency counter through FCNT or controls the charge/discharge function of capacity measurement by CAPTG (as shown in Chart 14)It can also be transferred through Pin 62 (SMP 1)by a reverser or the logic value can be obtained by the control register. (as shown Chart 18). 10..1 Bandwidth of AC Signal According to section 7.5,When providing appropriate frequency compensation to decay network, FS970X chip can directly process the AC signal under the frequency of approx. 100 kHz. If the bandwidth of AC signal is over 100 kH, the AD buffer ACBUF of FS970X will be unable to process. Thus, setting BPACBF=1, the high-frequency signal will bypass the AC buffer, and flow out directly from ACA, as shown in the upper left corner of Graph . However, when the bandwidth of the signal is higher than 1 MHz, if the signal flows from SDV, through CMPHMUX to ACA, the on/off resistor and parastic capact on the path will decay the high-frequency signal dramatically, causing problems to frequency response. Therefore, when processing AC signal higher than 1 MHz, setting MODE3:0=0011 will make endvo=1. At this time, the signal of SDV, through the CMOS switch controlled by endvo, flows directly out from DVO, as shown in the upper left corner of Graph 5. |
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