STM8S datasheet(349/467 Pages) STMICROELECTRONICS

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RM0016

Universal asynchronous receiver transmitter (UART)

377

LIN break and delimiter detection

The UART features a break detection circuit which is totally independent from the normal

UART receiver. A break can be detected whenever it occurs, during idle state or during a

frame.

When the receiver is enabled (REN=1 in UART_CR2), the circuit looks at the UART_RX

input for a start signal. The method for detecting start bits is the same when searching break

characters or data. After a start bit has been detected, the circuit samples the next bits

exactly like for the data (on the 8th, 9th and 10th samples). If 10 bits (when the LBDL = 0 in

UART_CR4) or 11 bits (when LBDL=1 in UART_CR4) are detected as ‘0’, and are followed

by a delimiter character, the LBDF flag is set in UART_CR4. If the LBDIEN bit=1, an

interrupt is generated.

If a ‘1’ is sampled before the 10 or 11 have occurred, the break detection circuit cancels the

current detection and searches for a start bit again. If LIN mode is disabled (LINEN=0), the

receiver continues working as a normal UART, without taking into account the break

detection.

If LIN mode is enabled (LINEN=1), as soon as a framing error occurs (i.e. stop bit detected

at ‘0’, which will be the case for any break frame), the receiver stops until the break

detection circuit receives either a ‘1’, if the break word was not complete, or a delimiter

character if a break has been detected.

The behavior of the break detector state machine and the break flag is shown in Figure 130:

Break detection in LIN mode (11-bit break length - LBDL bit is set) on page 350.

The LBDF flag is used in master mode, in slave mode the LHDF flag is used instead.

Examples of break frames are given on Figure 131: Break detection in LIN mode vs framing

error detection on page 351.

STM8S データシート(PDF) 349 Page - STMicroelectronics