STM8S datasheet(345/467 Pages) STMICROELECTRONICS

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RM0016

Universal asynchronous receiver transmitter (UART)

377

•

The output enable signal for the Smartcard I/O enables driving into a bidirectional line

which is also driven by the Smartcard. This signal is active while transmitting the start

and data bits and transmitting NACK. While transmitting the stop bits this signal is

disabled, so that the UART weakly drives a ‘1’ on the bidirectional line.

Note:

A break character is not significant in Smartcard mode. A 00h data with a framing error will

be treated as data and not as a break.

No IDLE frame is transmitted when toggling the TEN bit. The IDLE frame (as defined for the

other configurations) is not defined by the ISO protocol.

Figure 127 details how the NACK signal is sampled by the UART. In this example the UART

is transmitting a data and is configured with 1.5 stop bits. The receiver part of the UART is

enabled in order to check the integrity of the data and the NACK signal.

Figure 127. Parity error detection using 1.5 stop bits

The UART can provide a clock to the smartcard through the UART_CK output. In smartcard

mode, UART_CK is not associated to the communication but is simply derived from the

internal peripheral input clock through a 5-bit prescaler. The division ratio is configured in

the prescaler register UART_PSCR. UART_CK frequency can be programmed from

fMASTER/2 to fMASTER/62, where fMASTER is the peripheral input clock.

22.3.12

IrDA SIR ENDEC block

IrDA mode is selected by setting the IREN bit in the UART_CR5 register. The STOP bits in

the UART_CR3 register must be configured to “1 stop bit”. In IrDA mode, the following bits

must be kept cleared:

•

LINEN, STOP and CKEN bits in the UART_CR3 register,

•

SCEN and HDSEL bits in the UART_CR5 register.

Note:

This feature is only available in UART1, UART2 and UART4.

The IrDA SIR physical layer specifies use of a Return to Zero, Inverted (RZI) modulation

scheme that represents logic 0 as an infrared light pulse (see Figure 128).

The SIR Transmit encoder modulates the Non Return to Zero (NRZ) transmit bit stream

output from the UART. The output pulse stream is transmitted to an external output driver

and infrared LED. The UART supports only bit rates up to 115.2 kbps for the SIR ENDEC. In

normal mode the transmitted pulse width is specified as 3/16 of a bit period.

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