LT1768IGN datasheet(10/20 Pages) LINER

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LT1768

APPLICATIONS INFORMATION

The current mode pulse width modulation produces an

average current in inductor L1 proportional to the VC

voltage. Inductor L1 then acts as a switched mode current

source for a current driven Royer class converter with

efficiencies as high as 90%. T1, C4 and Q1 comprise the

Royer class converter which provides the CCFLs with a

zero DC, 60kHz sinusoidal waveform whose amplitude is

based on the average current in L1. Sinusoidal current

from both CCFLs is then returned to the LT1768 through

the DIO1/2 pins. A fraction of the CCFL current from the

negative half of its sine wave pulls against the internal

current source at the VC pin closing the loop. A single

capacitor on the VC pin provides loop compensation and

CCFL current averaging, which results in constant CCFL

current. Varying the value of the internal current source via

the Multimode Dimming block varies the CCFL current and

resultant CCFL light intensity.

Multimode Dimming

Previous backlighting solutions have used a traditional

error amplifier in the control loop to regulate lamp current.

The approach converted AC current into a DC voltage for

the input of the error amplifier. This approach used several

time constants in order to provide stable loop compensa-

tion. This compensation scheme meant that the loop had

to be fairly slow and that the output overshoot with start-

up or load conditions had to be carefully evaluated in terms

of transformer stress and breakdown voltage require-

ments. In addition, intensity control schemes were limited

to linear or PWM control. Linear intensity control schemes

provide the highest efficiency backlight circuits but either

limit dimming range, or violate lamp minimum or maxi-

mum CCFL current specifications to achieve wide dim-

ming ratios. PWM control schemes offer wide dimming

range but produce waveforms that may degrade CCFL life,

and waste power at higher CCFL currents. The LT1768’s

Multimode Dimming eliminates the error amplifier con-

cept entirely and combines the best of both control schemes

to extend CCFL life while providing the widest possible

dimming range.

The error amplifier is eliminated by summing the current

out of the Multimode Dimming block with a fraction of

feedback lamp current to form the control loop. This

topology reduces the number of time constants in the

control loop by combining the error signal conversion

scheme and frequency compensation into a single capaci-

tor (VC pin). The control loop thus exhibits the response

of a single pole system, allows for faster loop transient

response and minimizes overshoot under start-up or

overload conditions.

Referring to Figure 2, the source current into the VC pin

from the Multimode Dimming block (and resultant CCFL

current) has five distinct modes of operation. Which mode

is in use is determined by the voltages on the PROG and

PWM pins, and the currents that flow out of the RMAX and

RMIN pins.

Off Mode (VPROG < 0.5V), sets the VC source current to

zero, actively pulls VC to ground, and inhibits the GATE pin

from switching which results in zero lamp current.

Minimum current mode (0.5V < VPROG < 1V) sets the VC

source current equal to the current out of the 1.26V

referenced RMIN pin. The minimum VC source current

determines the dimming range of the display. Setting

RRMIN to produce the manufacturer’s minimum specified

CCFL current guarantees the maximum CCFL lifetime for

all PROG voltages, but limits the dimming range. Setting

RRMIN to produce currents less than the manufacturer’s

minimum specified CCFL current increases dimming range,

but places restrictions on the PROG voltage for normal

operation in order to maximize lifetime. To achieve the

maximum dimming ratio possible, IRMIN should be set to

zero by connecting the RMIN pin to the VREF pin.

For example, the circuit in Figure 1 produces a dimming

ratio of 100:1 at 1mA of lamp current, but sets the

minimum CCFL current to zero (RMIN is connected to

VREF). In this case, the PROG voltage must be kept above

1.12V to limit the CCFL current to 1mA (1mA is only a

typical minimum lamp current used for illustration, con-

sult lamp specifications for actual minimum allowable

value) during normal operation in order to meet CCFL

specifications to maximize lifetime. It should be noted that

taking the PROG voltage in Figure 1 down to 1V (0mA

CCFL current) enables dimming ratios greater than 500:1,

but violates minimum CCFL current specifications in most

lamps and is not recommended. Alternatively, discon-

necting RMIN from VREF and adding a 10kΩ resistor from

RMIN to AGND in Figure 1 sets the minimum CCFL current

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